From patchwork Thu Nov 5 16:38:04 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob X-Patchwork-Id: 8711 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 52F8891A9; Thu, 5 Nov 2015 17:39:20 +0100 (CET) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1on0080.outbound.protection.outlook.com [157.56.110.80]) by dpdk.org (Postfix) with ESMTP id 0644D91AA for ; Thu, 5 Nov 2015 17:39:18 +0100 (CET) Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Jerin.Jacob@caviumnetworks.com; Received: from jerin.caveonetworks.com (111.93.218.67) by CY1PR0701MB1977.namprd07.prod.outlook.com (10.163.141.19) with Microsoft SMTP Server (TLS) id 15.1.312.18; Thu, 5 Nov 2015 16:39:14 +0000 From: Jerin Jacob To: Date: Thu, 5 Nov 2015 22:08:04 +0530 Message-ID: <1446741498-3096-2-git-send-email-jerin.jacob@caviumnetworks.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1446741498-3096-1-git-send-email-jerin.jacob@caviumnetworks.com> References: <1446741498-3096-1-git-send-email-jerin.jacob@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [111.93.218.67] X-ClientProxiedBy: MA1PR01CA0067.INDPRD01.PROD.OUTLOOK.COM (25.164.116.167) To CY1PR0701MB1977.namprd07.prod.outlook.com (25.163.141.19) X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1977; 2:V+g6Y41qo8H4thwHchM5Dkw2+miqPQp1TVIc647xyO6C3aUnbTHXkpaik7F5Q1njNhdN2QaAVCr/NwPcWnGumnK/qOY87dXYUPXFoyP0q3HnuZOO+EKK2IO9LFrSBLsRK1Ego7laochCs3ekNyfPiujaKi0iqnRSHCD2zOMjOw8=; 3:UfwAK1imgWo77UsVPOtMO3WNGTnrKpeRoo04Bb6ZZ6dEVfSEvuzUoChl9w8kueYZv+sHsZa1BXytVkX+okxXZz1r5EkPjiWoJnN1CFZyLeR6v+HX8fj1xo+z06lxUryk9A1FzO/TSOTmQHEJD/dN6g==; 25:bekFSF27xSNpWdjpxccjsTDatRR3WVow6/w2lZegej98hoLZurfTM25o05xf8hPtECb7EGKJcfoq0XFerq1DVreRKyp8wRt/vmWAxH1DzU3zXTarmfuVc6VONOlxAoN4XolmUp9FGv7OlDV4Fegb36TJzazWJ0ABm8+22a87Uu192N3/VBsvm5f2uy9PkH0ioQ76nyKg/uKYzXsjUd6SDvv7eu+WdF5sgLgP/Yy1bDZWdrUo2LExdiNOfneJy7SMWcVPgPXbXDSylwpNLqyG1g== X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0701MB1977; X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1977; 20:bMNg9tSukQ7F/Facde4Ms9ADqS74YD+XxEk8dtmWwvkMO0Xp6hUe7g4Q8mlTn23NFsdXfLQXMf10PMmLp+p9+Jeaw6qAf4Vy+H6eh74xQjlgaAtA056Io2GUz4oH8m1DLnZvzvbyqXkOFLZT/K7VqMZcyt0ZjL78KvdxJ8fP7ZNt/0vTD3TAfKVW3snJj2+1F6TGFtvwnAWloKUCSNIAwEO/ulgyahX3VKqpNRf84E54/YSKkmLFxd5i3Y6YQ5dQe/QSD6cPp707Gf9+0gIY/pLCM4uL0+97HFnfORgHdyObJ7T1oeyzedh5Qh/d74WJALc7KMdYJU6KROiz234AN2FjJOvImU/85dcM56V1uxmqqpVhRMRrdtNI8xW6K6H5ZJZL+9j4O+MqQs/lCE99IBFkR4JVmZilCzZk/TRvdWKFwtizz2cRYOjMGRIlsqQOXGIOrUbseW1/kyCf+6ezoXgx51uC+PMw47Dg8U7VIP1JNa7bDpsiDAraVRcC9v3uJo3sSzFV7uTTOzaRQBdWrIKIlhKCdKFguDVUmL0mg/8Y6MGugjsw9+5BXWhk9EPiK/uRvZdT80IVTkf12LgIxCfLCmDeLT2dVEVgsKMhf/s= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(236414709691187); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(520078)(5005006)(8121501046)(3002001)(10201501046); SRVR:CY1PR0701MB1977; BCL:0; PCL:0; RULEID:; SRVR:CY1PR0701MB1977; X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1977; 4:1v0MvRM1ZcLeW8AL4oBxyBREdrTjdrdpzn2leWcumr/wcUqndbSme/cjyXEhowIJnynIBsyKB5n9M/RBmnI4/QEjiyWhw68kJrL55D6mqW5KKMlf9R6Cg0gYJdjmQxON0HW5cBMY8PxQqlJ1KaZtRD6gQn/FAEv4R2RdcOHvtXRqEXnI2lKw9LME+YS5ONYORsUcn10/hi6xxD3mrn9v4UlVDxqbPRbTde5AtjILnsntDaXvNjnz0xOu0FXHDATRDunIA1X89A6m6ljGwvXKghkIMOwdXakcWRkxyd7Bqwhhvu6A6w3js6nQfgtW+7RNbpedzBpUKvr64eduSjURSa8TUyjqPEPnscudfJAUn2r5emsWYxL6HyGFOQh0lqQV X-Forefront-PRVS: 0751474A44 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6009001)(189002)(199003)(2351001)(81156007)(5004730100002)(5003940100001)(50986999)(50226001)(76176999)(19580405001)(106356001)(105586002)(77096005)(50466002)(53416004)(47776003)(229853001)(48376002)(33646002)(19580395003)(69596002)(36756003)(107886002)(189998001)(42186005)(5008740100001)(40100003)(122386002)(5007970100001)(5001920100001)(5001960100002)(86362001)(2950100001)(5009440100003)(92566002)(4001430100002)(110136002)(87976001)(97736004)(101416001)(66066001)(7099028); DIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR0701MB1977; H:jerin.caveonetworks.com; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; Received-SPF: None (protection.outlook.com: caviumnetworks.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; CY1PR0701MB1977; 23:dIgqXXDv+9DjiJL9kLEmfakZHE0iuVEOw6BcAeR?= =?us-ascii?Q?L4JmcrsILtZhyVWQRDBIBTalcK4zHu9tikxJNtZxle7FyLVJMf0APF5vyIKq?= =?us-ascii?Q?OoIj6a01r+Jlzxok8r2cGKVbq3XR5xz6AXSjdcO5P8SXYAUb/KQJMyevLwGc?= =?us-ascii?Q?MDV+dDfPwJF4/r8b36OGVC8Te55LKdSyJYNv4q05HniL7t+AtrSwZ5wDEpT3?= =?us-ascii?Q?20KD7/tF+AKoznCvgxCD0x5TrFaui088SvDABgCo2Wdu0EVxqoX3cs13ZK+6?= =?us-ascii?Q?S2RlDRjK2dbyTds+B11JlicmmKL62xuFXN56JKnetFxQR4HhXFhwDPmxLJ6c?= =?us-ascii?Q?17LvY36dGoBnp8Hzq5m4S+vac7q+uaTmxhks/PQ7L3QrOE96X/tyvR51wDQW?= =?us-ascii?Q?nTMo/FMLbwMT48ZjXpf9wPF08FVPLkn2r+bed1/vYHVTYgeXVfC2F+uAQ4zd?= =?us-ascii?Q?bpw4wKXPz0fxh67szGXdT2CD6mTxPHJ5o8Wx/LT9CoowYibejnFK9oCTXihq?= =?us-ascii?Q?S6D+GlT6JLw/Zz4grccMTHY411u9qbnnnXATjw2dhTvhNsyKzQrpyV4NoPXc?= =?us-ascii?Q?U6qacPGs1HwwV3xq4OeZxOh0IuviWzy+LvVLGJ8m43+IgTPt92ayga7GySHp?= =?us-ascii?Q?C4/PcU6BpIaaXcE2/g5lObyjP/yKe43pw8y1m4ySmEMFV4JMCxqDw5kyyIcG?= =?us-ascii?Q?miYZfxLSoApzELAE6z5OXxNCayULJPs01VnrEQSmb13anzYNHXjJJssqc47/?= =?us-ascii?Q?hb66R67j3k6HcthJs/cwZ+b/iaOpXPIkr8yMZQkLHOdXrFqYSMNb7A0C0Gss?= =?us-ascii?Q?c5M5FpN9HL8TnA02/hV3b7noBZgakoPBhTZjh1oKjB5Ou+BekO/1iXqeqWrH?= =?us-ascii?Q?NChLtkIdJa9ELIS7Q9ibNs0ttvdvWjR+4amr441fwwkf9KqkloEV7g9q3Q4u?= =?us-ascii?Q?eCuU27+ui/V0O9mvmvMN6OCvWrJ0HchTLGfspGEBW+BjBeY1P8Waz7gUIKI7?= =?us-ascii?Q?v20Ci05+zQiEBAwC7kOTOwgfFDB4Vn8UpjV36K457zIycy0jqp9P26cbH5xy?= =?us-ascii?Q?FLsQ1WD3QfCsgHfUqg9AdD+DoXkxaQ5EsQn8Dzz2Gy+spnPephzdx/I6CPCh?= =?us-ascii?Q?6Djd8icNzrU0rVx9vbPUkwtMgzS0CS8SgLBsbiwU2J8fuDhj3Aq8Y/LMwCGQ?= =?us-ascii?Q?ZHld1n+ui1UxOXDA=3D?= X-Microsoft-Exchange-Diagnostics: 1; CY1PR0701MB1977; 5:8rj/c07LC3xPrrX3l+fP3dZ09KJ0wmS3gFF3A/DZkzD1I9bN+dKx1FkcJHXR+gfExR3yjHbzIQhPftPRgnO84Lh5FI1VL6vk8BsDPqJ5jV2LbAwRDHT4edBBSAiwDRXF52WBpEtITUM0xbfa86Yl1w==; 24:AiSvzTjSx4de34QfLA08B6qXs0v4UrmUqBYgj/rqr8AlKWpbTCbIvIAdHJ+JtKrjU/fAiTOj3XVIjDZtEz6bRfztGt8B/ONAd1ULWCDACKo=; 20:ibH/Bm5TjJm6JEv/y/Xr+oPctpZtC7F0T1NEMcWGbRzu+7+FJ7THHhxgDVxXRVl/6HYZ7e0TSADcxonNwqJBdQ== SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2015 16:39:14.9753 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0701MB1977 Subject: [dpdk-dev] [PATCH 01/15] eal: arm64: add armv8-a version of rte_atomic_64.h X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" except rte_?wb() functions other functions are used from RTE_FORCE_INTRINSICS=y scheme Signed-off-by: Jerin Jacob --- .../common/include/arch/arm/rte_atomic.h | 4 + .../common/include/arch/arm/rte_atomic_64.h | 88 ++++++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/arm/rte_atomic_64.h diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic.h b/lib/librte_eal/common/include/arch/arm/rte_atomic.h index f4f5783..f3f3b6e 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic.h @@ -33,6 +33,10 @@ #ifndef _RTE_ATOMIC_ARM_H_ #define _RTE_ATOMIC_ARM_H_ +#ifdef RTE_ARCH_64 +#include +#else #include +#endif #endif /* _RTE_ATOMIC_ARM_H_ */ diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h new file mode 100644 index 0000000..671caa7 --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -0,0 +1,88 @@ +/* + * BSD LICENSE + * + * Copyright (C) Cavium networks Ltd. 2015. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Cavium networks nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _RTE_ATOMIC_ARM64_H_ +#define _RTE_ATOMIC_ARM64_H_ + +#ifndef RTE_FORCE_INTRINSICS +# error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#include "generic/rte_atomic.h" + +#define dmb(opt) do { asm volatile("dmb " #opt : : : "memory"); } while (0) + +/** + * General memory barrier. + * + * Guarantees that the LOAD and STORE operations generated before the + * barrier occur before the LOAD and STORE operations generated after. + * This function is architecture dependent. + */ +static inline void rte_mb(void) +{ + dmb(ish); +} + +/** + * Write memory barrier. + * + * Guarantees that the STORE operations generated before the barrier + * occur before the STORE operations generated after. + * This function is architecture dependent. + */ +static inline void rte_wmb(void) +{ + dmb(ishst); +} + +/** + * Read memory barrier. + * + * Guarantees that the LOAD operations generated before the barrier + * occur before the LOAD operations generated after. + * This function is architecture dependent. + */ +static inline void rte_rmb(void) +{ + dmb(ishld); +} + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_ATOMIC_ARM64_H_ */