From patchwork Sat Dec 3 14:59:35 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiwei Bie X-Patchwork-Id: 17578 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 2B5446A94; Sat, 3 Dec 2016 16:05:14 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 3BC3C5678 for ; Sat, 3 Dec 2016 16:04:32 +0100 (CET) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP; 03 Dec 2016 07:04:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,736,1477983600"; d="scan'208";a="793815224" Received: from dpdk19.sh.intel.com ([10.239.129.113]) by FMSMGA003.fm.intel.com with ESMTP; 03 Dec 2016 07:04:25 -0800 From: Tiwei Bie To: dev@dpdk.org Date: Sat, 3 Dec 2016 22:59:35 +0800 Message-Id: <1480777177-95673-2-git-send-email-tiwei.bie@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480777177-95673-1-git-send-email-tiwei.bie@intel.com> References: <1480777177-95673-1-git-send-email-tiwei.bie@intel.com> Subject: [dpdk-dev] [PATCH 1/3] lib: add MACsec offload flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" These flags will be used in next commits in the ixgbe pmd. Signed-off-by: Tiwei Bie --- lib/librte_ether/rte_ethdev.h | 2 ++ lib/librte_mbuf/rte_mbuf.h | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index 9678179..25a33e9 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -857,6 +857,7 @@ struct rte_eth_conf { #define DEV_RX_OFFLOAD_TCP_LRO 0x00000010 #define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020 #define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040 +#define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080 /** * TX offload capabilities of a device. @@ -874,6 +875,7 @@ struct rte_eth_conf { #define DEV_TX_OFFLOAD_GRE_TNL_TSO 0x00000400 /**< Used for tunneling packet. */ #define DEV_TX_OFFLOAD_IPIP_TNL_TSO 0x00000800 /**< Used for tunneling packet. */ #define DEV_TX_OFFLOAD_GENEVE_TNL_TSO 0x00001000 /**< Used for tunneling packet. */ +#define DEV_TX_OFFLOAD_MACSEC_INSERT 0x00002000 /** * Ethernet device information diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h index ead7c6e..46bb23f 100644 --- a/lib/librte_mbuf/rte_mbuf.h +++ b/lib/librte_mbuf/rte_mbuf.h @@ -182,6 +182,11 @@ extern "C" { /* add new TX flags here */ /** + * MACsec offload flag. + */ +#define PKT_TX_MACSEC (1ULL << 44) + +/** * Bits 45:48 used for the tunnel type. * When doing Tx offload like TSO or checksum, the HW needs to configure the * tunnel type into the HW descriptors.