From patchwork Fri Feb 3 08:44:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao1, Wei" X-Patchwork-Id: 20146 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 79EDEAB08; Fri, 3 Feb 2017 09:50:35 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 3D1249E3 for ; Fri, 3 Feb 2017 09:50:33 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 03 Feb 2017 00:50:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,328,1477983600"; d="scan'208";a="929715368" Received: from dpdk1.bj.intel.com ([172.16.182.84]) by orsmga003.jf.intel.com with ESMTP; 03 Feb 2017 00:50:18 -0800 From: Wei Zhao To: dev@dpdk.org Cc: Wei Zhao Date: Fri, 3 Feb 2017 16:44:49 +0800 Message-Id: <1486111489-32972-1-git-send-email-wei.zhao1@intel.com> X-Mailer: git-send-email 2.5.5 Subject: [dpdk-dev] [PATCH] net/ixgbe: fix parsing fdir vxlan issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" VNI of VXLAN is parsed wrongly. The root cause is that array vni in item VXLAN also uses network byte ordering. Fixes: 11777435c727 ("net/ixgbe: parse flow director filter") Signed-off-by: Wei Zhao --- drivers/net/ixgbe/ixgbe_flow.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_flow.c b/drivers/net/ixgbe/ixgbe_flow.c index 82aceed..ce96880 100644 --- a/drivers/net/ixgbe/ixgbe_flow.c +++ b/drivers/net/ixgbe/ixgbe_flow.c @@ -2132,15 +2132,16 @@ ixgbe_parse_fdir_filter_tunnel(const struct rte_flow_attr *attr, rte_memcpy(&rule->mask.tunnel_id_mask, vxlan_mask->vni, RTE_DIM(vxlan_mask->vni)); - rule->mask.tunnel_id_mask <<= 8; if (item->spec) { rule->b_spec = TRUE; vxlan_spec = (const struct rte_flow_item_vxlan *) item->spec; - rte_memcpy(&rule->ixgbe_fdir.formatted.tni_vni, + rte_memcpy(((uint8_t *) + &rule->ixgbe_fdir.formatted.tni_vni + 1), vxlan_spec->vni, RTE_DIM(vxlan_spec->vni)); - rule->ixgbe_fdir.formatted.tni_vni <<= 8; + rule->ixgbe_fdir.formatted.tni_vni = rte_be_to_cpu_32( + rule->ixgbe_fdir.formatted.tni_vni); } }