From patchwork Thu Aug 24 10:20:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rybalchenko, Kirill" X-Patchwork-Id: 27843 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id A055C7D63; Thu, 24 Aug 2017 12:20:59 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 493277D5E for ; Thu, 24 Aug 2017 12:20:58 +0200 (CEST) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Aug 2017 03:20:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,421,1498546800"; d="scan'208";a="144048873" Received: from silpixa00389036.ir.intel.com (HELO silpixa00389036.ger.corp.intel.com) ([10.237.223.231]) by fmsmga006.fm.intel.com with ESMTP; 24 Aug 2017 03:20:56 -0700 From: Kirill Rybalchenko To: dev@dpdk.org Cc: kirill.rybalchenko@intel.com, andrey.chilikin@intel.com, beilei.xing@intel.com Date: Thu, 24 Aug 2017 11:20:42 +0100 Message-Id: <1503570044-104133-4-git-send-email-kirill.rybalchenko@intel.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1503570044-104133-1-git-send-email-kirill.rybalchenko@intel.com> References: <1503570044-104133-1-git-send-email-kirill.rybalchenko@intel.com> Subject: [dpdk-dev] [PATCH 3/5] net/i40e: add new functions to manipulate with pctype mapping table X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add new functions which allow modify, return or reset to default the contents of flow type to pctype dynamic mapping table. Signed-off-by: Kirill Rybalchenko --- drivers/net/i40e/rte_pmd_i40e.c | 98 +++++++++++++++++++++++++++++++++++++++++ drivers/net/i40e/rte_pmd_i40e.h | 60 +++++++++++++++++++++++++ 2 files changed, 158 insertions(+) diff --git a/drivers/net/i40e/rte_pmd_i40e.c b/drivers/net/i40e/rte_pmd_i40e.c index 950a0d6..c91efd5 100644 --- a/drivers/net/i40e/rte_pmd_i40e.c +++ b/drivers/net/i40e/rte_pmd_i40e.c @@ -2117,3 +2117,101 @@ int rte_pmd_i40e_ptype_mapping_replace(uint8_t port, return 0; } + +int rte_pmd_i40e_flow_type_mapping_reset(uint8_t port) +{ + struct rte_eth_dev *dev; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + + dev = &rte_eth_devices[port]; + + if (!is_i40e_supported(dev)) + return -ENOTSUP; + + i40e_set_default_pctype_table(dev); + + return 0; +} + +int rte_pmd_i40e_flow_type_mapping_get( + uint8_t port, + struct rte_pmd_i40e_flow_type_mapping *mapping_items, + uint16_t size, + uint16_t *count, + uint8_t valid_only) +{ + struct rte_eth_dev *dev; + struct i40e_adapter *ad; + int n = 0; + uint16_t i; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + + dev = &rte_eth_devices[port]; + + if (!is_i40e_supported(dev)) + return -ENOTSUP; + + ad = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + + for (i = 0; i < I40E_FLOW_TYPE_MAX; i++) { + if (n >= size) + break; + if (valid_only && ad->pcypes_tbl[i] == 0ULL) + continue; + mapping_items[n].flow_type = i; + mapping_items[n].pctype = ad->pcypes_tbl[i]; + n++; + } + + *count = n; + return 0; +} + +int +rte_pmd_i40e_flow_type_mapping_update( + uint8_t port, + struct rte_pmd_i40e_flow_type_mapping *mapping_items, + uint16_t count, + uint8_t exclusive) +{ + struct rte_eth_dev *dev; + struct i40e_adapter *ad; + int i; + + RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV); + + dev = &rte_eth_devices[port]; + + if (!is_i40e_supported(dev)) + return -ENOTSUP; + + if (count > I40E_FLOW_TYPE_MAX) + return -EINVAL; + + for (i = 0; i < count; i++) + if (mapping_items[i].flow_type >= I40E_FLOW_TYPE_MAX) + return -EINVAL; + + ad = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + + if (exclusive) { + for (i = 0; i < I40E_FLOW_TYPE_MAX; i++) + ad->pcypes_tbl[i] = 0ULL; + ad->flow_types_msk = 0ULL; + } + + for (i = 0; i < count; i++) { + ad->pcypes_tbl[mapping_items[i].flow_type] = mapping_items[i].pctype; + if (mapping_items[i].pctype) + ad->flow_types_msk |= (1ULL << mapping_items[i].flow_type); + else + ad->flow_types_msk &= ~(1ULL << mapping_items[i].flow_type); + } + + for (i = 0, ad->pctypes_msk = 0ULL; i < I40E_FLOW_TYPE_MAX; i++) + ad->pctypes_msk |= ad->pcypes_tbl[i]; + + return 0; +} diff --git a/drivers/net/i40e/rte_pmd_i40e.h b/drivers/net/i40e/rte_pmd_i40e.h index 356fa89..d993c89 100644 --- a/drivers/net/i40e/rte_pmd_i40e.h +++ b/drivers/net/i40e/rte_pmd_i40e.h @@ -637,4 +637,64 @@ int rte_pmd_i40e_ptype_mapping_replace(uint8_t port, uint8_t mask, uint32_t pkt_type); +struct rte_pmd_i40e_flow_type_mapping { + uint8_t flow_type; /**< software defined flow type*/ + uint64_t pctype; /**< hardware defined pctype */ +}; + +/** + * Update hardware defined pctype to software defined flow type + * mapping table. + * + * @param port + * pointer to port identifier of the device. + * @param mapping_items + * the base address of the mapping items array. + * @param count + * number of mapping items. + * @param exclusive + * the flag indicate different ptype mapping update method. + * -(0) only overwrite referred PTYPE mapping, + * keep other PTYPEs mapping unchanged. + * -(!0) overwrite referred PTYPE mapping, + * set other PTYPEs maps to PTYPE_UNKNOWN. + */ +int rte_pmd_i40e_flow_type_mapping_update( + uint8_t port, + struct rte_pmd_i40e_flow_type_mapping *mapping_items, + uint16_t count, + uint8_t exclusive); + +/** + * Get software defined flow type to hardware defined pctype + * mapping items. + * + * @param port + * pointer to port identifier of the device. + * @param mapping_items + * the base address of the array to store returned items. + * @param size + * the size of the input array. + * @param count + * the place to store the number of returned items. + * @param valid_only + * -(0) return full mapping table. + * -(!0) only return mapping items which flow_type != RTE_ETH_FLOW_UNKNOWN. + */ +int rte_pmd_i40e_flow_type_mapping_get( + uint8_t port, + struct rte_pmd_i40e_flow_type_mapping *mapping_items, + uint16_t size, + uint16_t *count, + uint8_t valid_only); + +/** + * Reset hardware defined pctype to software defined flow type + * mapping table to default. + * + * @param port + * pointer to port identifier of the device + */ +int rte_pmd_i40e_flow_type_mapping_reset(uint8_t port); + #endif /* _PMD_I40E_H_ */