[v3,3/3] doc/qat: update AES-CMAC documentation
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Commit Message
Update the QAT documentation to show that it supports AES-CMAC.
Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
---
doc/guides/cryptodevs/features/qat.ini | 1 +
doc/guides/cryptodevs/qat.rst | 1 +
doc/guides/rel_notes/release_18_11.rst | 6 ++++++
drivers/crypto/qat/qat_sym_capabilities.h | 20 ++++++++++++++++++++
4 files changed, 28 insertions(+)
Comments
> -----Original Message-----
> From: Cel, TomaszX
> Sent: Monday, October 8, 2018 6:17 PM
> To: dev@dpdk.org
> Cc: stable@dpdk.org; Trahe, Fiona <fiona.trahe@intel.com>; akhil.goyal@nxp.com; Kovacevic, Marko
> <marko.kovacevic@intel.com>; Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>;
> mattias.ronnblom@ericsson.com; Cel, TomaszX <tomaszx.cel@intel.com>
> Subject: [PATCH v3 3/3] doc/qat: update AES-CMAC documentation
>
> Update the QAT documentation to show that it supports AES-CMAC.
>
> Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Nack.
The capabilities change should be in the PMD patch 1/3
We'll send a v4 shortly.
@@ -48,6 +48,7 @@ SNOW3G UIA2 = Y
KASUMI F9 = Y
AES XCBC MAC = Y
ZUC EIA3 = Y
+AES CMAC (128) = Y
;
; Supported AEAD algorithms of the 'qat' crypto driver.
@@ -62,6 +62,7 @@ Hash algorithms:
* ``RTE_CRYPTO_AUTH_KASUMI_F9``
* ``RTE_CRYPTO_AUTH_AES_GMAC``
* ``RTE_CRYPTO_AUTH_ZUC_EIA3``
+* ``RTE_CRYPTO_AUTH_AES_CMAC``
Supported AEAD algorithms:
@@ -72,6 +72,12 @@ New Features
SR-IOV option in Hyper-V and Azure. This is an alternative to the previous
vdev_netvsc, tap, and failsafe drivers combination.
+* **Updated the QAT PMD.**
+
+ The QAT PMD was updated with additional support for:
+
+ * AES-CMAC algorithm.
+
* **Updated failsafe driver.**
Updated the failsafe driver including the following changes:
@@ -154,6 +154,26 @@
}, } \
}, } \
}, \
+ { /* AES CMAC */ \
+ .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, \
+ {.sym = { \
+ .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, \
+ {.auth = { \
+ .algo = RTE_CRYPTO_AUTH_AES_CMAC, \
+ .block_size = 16, \
+ .key_size = { \
+ .min = 16, \
+ .max = 16, \
+ .increment = 0 \
+ }, \
+ .digest_size = { \
+ .min = 12, \
+ .max = 16, \
+ .increment = 4 \
+ } \
+ }, } \
+ }, } \
+ }, \
{ /* AES CCM */ \
.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, \
{.sym = { \