[v3,3/3] doc/qat: update AES-CMAC documentation

Message ID 1539019005-13210-4-git-send-email-tomaszx.cel@intel.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series add AES-CMAC support |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Cel, TomaszX Oct. 8, 2018, 5:16 p.m. UTC
  Update the QAT documentation to show that it supports AES-CMAC.

Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
---
 doc/guides/cryptodevs/features/qat.ini    |  1 +
 doc/guides/cryptodevs/qat.rst             |  1 +
 doc/guides/rel_notes/release_18_11.rst    |  6 ++++++
 drivers/crypto/qat/qat_sym_capabilities.h | 20 ++++++++++++++++++++
 4 files changed, 28 insertions(+)
  

Comments

Fiona Trahe Oct. 9, 2018, 2:37 p.m. UTC | #1
> -----Original Message-----
> From: Cel, TomaszX
> Sent: Monday, October 8, 2018 6:17 PM
> To: dev@dpdk.org
> Cc: stable@dpdk.org; Trahe, Fiona <fiona.trahe@intel.com>; akhil.goyal@nxp.com; Kovacevic, Marko
> <marko.kovacevic@intel.com>; Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>;
> mattias.ronnblom@ericsson.com; Cel, TomaszX <tomaszx.cel@intel.com>
> Subject: [PATCH v3 3/3] doc/qat: update AES-CMAC documentation
> 
> Update the QAT documentation to show that it supports AES-CMAC.
> 
> Signed-off-by: Tomasz Cel <tomaszx.cel@intel.com>
Nack.
The capabilities change should be in the PMD patch 1/3
We'll send a v4 shortly.
  

Patch

diff --git a/doc/guides/cryptodevs/features/qat.ini b/doc/guides/cryptodevs/features/qat.ini
index 220291b..4f15ee0 100644
--- a/doc/guides/cryptodevs/features/qat.ini
+++ b/doc/guides/cryptodevs/features/qat.ini
@@ -48,6 +48,7 @@  SNOW3G UIA2  = Y
 KASUMI F9    = Y
 AES XCBC MAC = Y
 ZUC EIA3     = Y
+AES CMAC (128) = Y
 
 ;
 ; Supported AEAD algorithms of the 'qat' crypto driver.
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index b09624f..d1d4833 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -62,6 +62,7 @@  Hash algorithms:
 * ``RTE_CRYPTO_AUTH_KASUMI_F9``
 * ``RTE_CRYPTO_AUTH_AES_GMAC``
 * ``RTE_CRYPTO_AUTH_ZUC_EIA3``
+* ``RTE_CRYPTO_AUTH_AES_CMAC``
 
 Supported AEAD algorithms:
 
diff --git a/doc/guides/rel_notes/release_18_11.rst b/doc/guides/rel_notes/release_18_11.rst
index 2133a5b..18a39a8 100644
--- a/doc/guides/rel_notes/release_18_11.rst
+++ b/doc/guides/rel_notes/release_18_11.rst
@@ -72,6 +72,12 @@  New Features
   SR-IOV option in Hyper-V and Azure. This is an alternative to the previous
   vdev_netvsc, tap, and failsafe drivers combination.
 
+* **Updated the QAT PMD.**
+
+  The QAT PMD was updated with additional support for:
+
+  * AES-CMAC algorithm.
+
 * **Updated failsafe driver.**
 
   Updated the failsafe driver including the following changes:
diff --git a/drivers/crypto/qat/qat_sym_capabilities.h b/drivers/crypto/qat/qat_sym_capabilities.h
index eea08bc..7cba87d 100644
--- a/drivers/crypto/qat/qat_sym_capabilities.h
+++ b/drivers/crypto/qat/qat_sym_capabilities.h
@@ -154,6 +154,26 @@ 
 			}, }						\
 		}, }							\
 	},								\
+	{	/* AES CMAC */						\
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,			\
+		{.sym = {						\
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,	\
+			{.auth = {					\
+				.algo = RTE_CRYPTO_AUTH_AES_CMAC,	\
+				.block_size = 16,			\
+				.key_size = {				\
+					.min = 16,			\
+					.max = 16,			\
+					.increment = 0			\
+				},					\
+				.digest_size = {			\
+					.min = 12,			\
+					.max = 16,			\
+					.increment = 4			\
+				}					\
+			}, }						\
+		}, }							\
+	},								\
 	{	/* AES CCM */						\
 		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,			\
 		{.sym = {						\