net/i40e: adjust the RSS table

Message ID 1542936954-39421-1-git-send-email-xiaoyun.li@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Qi Zhang
Headers
Series net/i40e: adjust the RSS table |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/intel-Performance-Testing success Performance Testing PASS

Commit Message

Li, Xiaoyun Nov. 23, 2018, 1:35 a.m. UTC
  When starting the device, the RSS table is set. For 8 queues, the RSS hash
table would be like | 3,2,1,0,7,6,5,4 | 3,2,1,0,7,6,5,4 |... This patch
adjusts this table to set entries sequentially. Then for 8 queues, the
RSS table would be like | 0,1,2,3,4,5,6,7 | 0,1,2,3,4,5,6,7 |...

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
---
 drivers/net/i40e/i40e_ethdev.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)
  

Comments

Qi Zhang Dec. 3, 2018, 5:29 a.m. UTC | #1
> -----Original Message-----
> From: Li, Xiaoyun
> Sent: Friday, November 23, 2018 9:36 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Li, Xiaoyun <xiaoyun.li@intel.com>
> Subject: [PATCH] net/i40e: adjust the RSS table
> 
> When starting the device, the RSS table is set. For 8 queues, the RSS hash table
> would be like | 3,2,1,0,7,6,5,4 | 3,2,1,0,7,6,5,4 |... This patch adjusts this table
> to set entries sequentially. Then for 8 queues, the RSS table would be like |
> 0,1,2,3,4,5,6,7 | 0,1,2,3,4,5,6,7 |...

My understanding is this is a byte order issue.
Does below change will fix the same thing?

- I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut);
- I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), rte_bswap32(lut));


> 
> Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
> ---
>  drivers/net/i40e/i40e_ethdev.c | 15 ++++++++++-----
>  1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 790ecc3..031eba0 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -8468,6 +8468,7 @@ i40e_pf_config_rss(struct i40e_pf *pf)  {
>  	struct i40e_hw *hw = I40E_PF_TO_HW(pf);
>  	struct rte_eth_rss_conf rss_conf;
> +	uint32_t size = hw->func_caps.rss_table_size;
>  	uint32_t i, lut = 0;
>  	uint16_t j, num;
> 
> @@ -8489,13 +8490,17 @@ i40e_pf_config_rss(struct i40e_pf *pf)
>  		return -ENOTSUP;
>  	}
> 
> -	for (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) {
> -		if (j == num)
> -			j = 0;
> +	for (i = size - 1, j = (size - 1) % num;; i--, j--) {
>  		lut = (lut << 8) | (j & ((0x1 <<
> -			hw->func_caps.rss_table_entry_width) - 1));
> -		if ((i & 3) == 3)
> +		      hw->func_caps.rss_table_entry_width) - 1));
> +
> +		if (j == 0)
> +			j = num;
> +
> +		if ((i & 3) == 0)
>  			I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut);
> +		if (i == 0)
> +			break;
>  	}
> 
>  	rss_conf = pf->dev_data->dev_conf.rx_adv_conf.rss_conf;
> --
> 2.7.4
  

Patch

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 790ecc3..031eba0 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -8468,6 +8468,7 @@  i40e_pf_config_rss(struct i40e_pf *pf)
 {
 	struct i40e_hw *hw = I40E_PF_TO_HW(pf);
 	struct rte_eth_rss_conf rss_conf;
+	uint32_t size = hw->func_caps.rss_table_size;
 	uint32_t i, lut = 0;
 	uint16_t j, num;
 
@@ -8489,13 +8490,17 @@  i40e_pf_config_rss(struct i40e_pf *pf)
 		return -ENOTSUP;
 	}
 
-	for (i = 0, j = 0; i < hw->func_caps.rss_table_size; i++, j++) {
-		if (j == num)
-			j = 0;
+	for (i = size - 1, j = (size - 1) % num;; i--, j--) {
 		lut = (lut << 8) | (j & ((0x1 <<
-			hw->func_caps.rss_table_entry_width) - 1));
-		if ((i & 3) == 3)
+		      hw->func_caps.rss_table_entry_width) - 1));
+
+		if (j == 0)
+			j = num;
+
+		if ((i & 3) == 0)
 			I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i >> 2), lut);
+		if (i == 0)
+			break;
 	}
 
 	rss_conf = pf->dev_data->dev_conf.rx_adv_conf.rss_conf;