From patchwork Thu Feb 7 16:29:15 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 50207 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C28ED1B5C5; Thu, 7 Feb 2019 17:30:51 +0100 (CET) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 929E21B578 for ; Thu, 7 Feb 2019 17:30:36 +0100 (CET) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id 535F7B80075; Thu, 7 Feb 2019 16:30:35 +0000 (UTC) Received: from ocex03.SolarFlarecom.com (10.20.40.36) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 7 Feb 2019 08:30:31 -0800 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Thu, 7 Feb 2019 08:30:30 -0800 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id x17GUTP1015287; Thu, 7 Feb 2019 16:30:29 GMT Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id 8BB9B1613E4; Thu, 7 Feb 2019 16:30:29 +0000 (GMT) From: Andrew Rybchenko To: CC: Igor Romanov Date: Thu, 7 Feb 2019 16:29:15 +0000 Message-ID: <1549556983-10896-11-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1549556983-10896-1-git-send-email-arybchenko@solarflare.com> References: <1549556983-10896-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24412.006 X-TM-AS-Result: No-2.929700-4.000000-10 X-TMASE-MatchedRID: Ln/YJtuWXSXBXlkPaxAt1RcqpH7D1rtQSoCG4sefl8Qs/uUAk6xP7NYI JSW5nrIT2aZ0LBMGZL1N/B1iBfI2oqK176S49UNH4RtSDjG+z7CH7D1bP/FcOky0asjQVFrADhY jfgV723NtMbP5CeY5H3q/3tVeyVFpr78SC5iivxwURSScn+QSXt0H8LFZNFG7/nnwJ52QYi89zd FMl2nL2rdItAbbFxRjHRFi1NAwtSRQRAYFyTvYyY7ixVTCN35/r12lyyoo6FjnOA2yEhgIdQNOk E/FViXrfxExeyut/nuDJXhXmDOQN5N1JFeUKeMEiOOUXfTkScBZSbxIRLLN37zfneGoTKOTVlxr 1FJij9s= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--2.929700-4.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24412.006 X-MDID: 1549557036-IyVPwJNTwo2v Subject: [dpdk-dev] [PATCH 10/38] net/sfc: use NIC Rx descs limits instead of defines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Igor Romanov Descriptor limits are not common for all NIC families. Use the variables from NIC configuration instead of deprecated defines. Signed-off-by: Igor Romanov Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/sfc.c | 6 ++++++ drivers/net/sfc/sfc.h | 3 +++ drivers/net/sfc/sfc_dp_rx.h | 7 +++++++ drivers/net/sfc/sfc_ef10_essb_rx.c | 7 ++++--- drivers/net/sfc/sfc_ef10_rx.c | 5 +++-- drivers/net/sfc/sfc_ethdev.c | 6 +++--- drivers/net/sfc/sfc_rx.c | 18 +++++++++++++----- 7 files changed, 39 insertions(+), 13 deletions(-) diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c index 2e29bfaf4..26c7c322f 100644 --- a/drivers/net/sfc/sfc.c +++ b/drivers/net/sfc/sfc.c @@ -756,6 +756,12 @@ sfc_attach(struct sfc_adapter *sa) if (rc != 0) goto fail_estimate_rsrc_limits; + sa->rxq_max_entries = encp->enc_rxq_max_ndescs; + SFC_ASSERT(rte_is_power_of_2(sa->rxq_max_entries)); + + sa->rxq_min_entries = encp->enc_rxq_min_ndescs; + SFC_ASSERT(rte_is_power_of_2(sa->rxq_min_entries)); + sa->txq_max_entries = encp->enc_txq_max_ndescs; SFC_ASSERT(rte_is_power_of_2(sa->txq_max_entries)); diff --git a/drivers/net/sfc/sfc.h b/drivers/net/sfc/sfc.h index 3acb3fe48..6c99e9e66 100644 --- a/drivers/net/sfc/sfc.h +++ b/drivers/net/sfc/sfc.h @@ -244,6 +244,9 @@ struct sfc_adapter { unsigned int rxq_max; unsigned int txq_max; + unsigned int rxq_max_entries; + unsigned int rxq_min_entries; + unsigned int txq_max_entries; unsigned int txq_min_entries; diff --git a/drivers/net/sfc/sfc_dp_rx.h b/drivers/net/sfc/sfc_dp_rx.h index 7e911648e..c3cc4ff5b 100644 --- a/drivers/net/sfc/sfc_dp_rx.h +++ b/drivers/net/sfc/sfc_dp_rx.h @@ -28,6 +28,12 @@ struct sfc_dp_rxq { struct sfc_dp_queue dpq; }; +/** Datapath receive queue descriptor number limitations */ +struct sfc_dp_rx_hw_limits { + unsigned int rxq_max_entries; + unsigned int rxq_min_entries; +}; + /** * Datapath receive queue creation information. * @@ -114,6 +120,7 @@ typedef int (sfc_dp_rx_pool_ops_supported_t)(const char *pool); * @return 0 or positive errno. */ typedef int (sfc_dp_rx_qsize_up_rings_t)(uint16_t nb_rx_desc, + struct sfc_dp_rx_hw_limits *limits, struct rte_mempool *mb_pool, unsigned int *rxq_entries, unsigned int *evq_entries, diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c index a24f54e7b..fee7a8b27 100644 --- a/drivers/net/sfc/sfc_ef10_essb_rx.c +++ b/drivers/net/sfc/sfc_ef10_essb_rx.c @@ -487,6 +487,7 @@ sfc_ef10_essb_rx_pool_ops_supported(const char *pool) static sfc_dp_rx_qsize_up_rings_t sfc_ef10_essb_rx_qsize_up_rings; static int sfc_ef10_essb_rx_qsize_up_rings(uint16_t nb_rx_desc, + struct sfc_dp_rx_hw_limits *limits, struct rte_mempool *mb_pool, unsigned int *rxq_entries, unsigned int *evq_entries, @@ -513,11 +514,11 @@ sfc_ef10_essb_rx_qsize_up_rings(uint16_t nb_rx_desc, nb_hw_rx_desc = RTE_MAX(SFC_DIV_ROUND_UP(nb_rx_desc, mp_info.contig_block_size), SFC_EF10_RX_WPTR_ALIGN + 1); - if (nb_hw_rx_desc <= EFX_RXQ_MINNDESCS) { - *rxq_entries = EFX_RXQ_MINNDESCS; + if (nb_hw_rx_desc <= limits->rxq_min_entries) { + *rxq_entries = limits->rxq_min_entries; } else { *rxq_entries = rte_align32pow2(nb_hw_rx_desc); - if (*rxq_entries > EFX_RXQ_MAXNDESCS) + if (*rxq_entries > limits->rxq_max_entries) return EINVAL; } diff --git a/drivers/net/sfc/sfc_ef10_rx.c b/drivers/net/sfc/sfc_ef10_rx.c index 77ca580b5..49e32faaf 100644 --- a/drivers/net/sfc/sfc_ef10_rx.c +++ b/drivers/net/sfc/sfc_ef10_rx.c @@ -566,6 +566,7 @@ sfc_ef10_rx_get_dev_info(struct rte_eth_dev_info *dev_info) static sfc_dp_rx_qsize_up_rings_t sfc_ef10_rx_qsize_up_rings; static int sfc_ef10_rx_qsize_up_rings(uint16_t nb_rx_desc, + struct sfc_dp_rx_hw_limits *limits, __rte_unused struct rte_mempool *mb_pool, unsigned int *rxq_entries, unsigned int *evq_entries, @@ -575,8 +576,8 @@ sfc_ef10_rx_qsize_up_rings(uint16_t nb_rx_desc, * rte_ethdev API guarantees that the number meets min, max and * alignment requirements. */ - if (nb_rx_desc <= EFX_RXQ_MINNDESCS) - *rxq_entries = EFX_RXQ_MINNDESCS; + if (nb_rx_desc <= limits->rxq_min_entries) + *rxq_entries = limits->rxq_min_entries; else *rxq_entries = rte_align32pow2(nb_rx_desc); diff --git a/drivers/net/sfc/sfc_ethdev.c b/drivers/net/sfc/sfc_ethdev.c index 57b8b7e49..e7bfd8917 100644 --- a/drivers/net/sfc/sfc_ethdev.c +++ b/drivers/net/sfc/sfc_ethdev.c @@ -153,12 +153,12 @@ sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) } /* Initialize to hardware limits */ - dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS; - dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS; + dev_info->rx_desc_lim.nb_max = sa->rxq_max_entries; + dev_info->rx_desc_lim.nb_min = sa->rxq_min_entries; /* The RXQ hardware requires that the descriptor count is a power * of 2, but rx_desc_lim cannot properly describe that constraint. */ - dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS; + dev_info->rx_desc_lim.nb_align = sa->rxq_min_entries; /* Initialize to hardware limits */ dev_info->tx_desc_lim.nb_max = sa->txq_max_entries; diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c index 54d4b5872..c8dec8d6e 100644 --- a/drivers/net/sfc/sfc_rx.c +++ b/drivers/net/sfc/sfc_rx.c @@ -411,6 +411,7 @@ sfc_rxq_by_dp_rxq(const struct sfc_dp_rxq *dp_rxq) static sfc_dp_rx_qsize_up_rings_t sfc_efx_rx_qsize_up_rings; static int sfc_efx_rx_qsize_up_rings(uint16_t nb_rx_desc, + __rte_unused struct sfc_dp_rx_hw_limits *limits, __rte_unused struct rte_mempool *mb_pool, unsigned int *rxq_entries, unsigned int *evq_entries, @@ -971,13 +972,19 @@ sfc_rx_qinit(struct sfc_adapter *sa, unsigned int sw_index, struct sfc_evq *evq; struct sfc_rxq *rxq; struct sfc_dp_rx_qcreate_info info; + struct sfc_dp_rx_hw_limits hw_limits; - rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, mb_pool, &rxq_entries, - &evq_entries, &rxq_max_fill_level); + memset(&hw_limits, 0, sizeof(hw_limits)); + hw_limits.rxq_max_entries = sa->rxq_max_entries; + hw_limits.rxq_min_entries = sa->rxq_min_entries; + + rc = sa->priv.dp_rx->qsize_up_rings(nb_rx_desc, &hw_limits, mb_pool, + &rxq_entries, &evq_entries, + &rxq_max_fill_level); if (rc != 0) goto fail_size_up_rings; - SFC_ASSERT(rxq_entries >= EFX_RXQ_MINNDESCS); - SFC_ASSERT(rxq_entries <= EFX_RXQ_MAXNDESCS); + SFC_ASSERT(rxq_entries >= sa->rxq_min_entries); + SFC_ASSERT(rxq_entries <= sa->rxq_max_entries); SFC_ASSERT(rxq_max_fill_level <= nb_rx_desc); offloads = rx_conf->offloads | @@ -1403,9 +1410,10 @@ sfc_rx_qinit_info(struct sfc_adapter *sa, unsigned int sw_index) { struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); struct sfc_rxq_info *rxq_info = &sas->rxq_info[sw_index]; + const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); unsigned int max_entries; - max_entries = EFX_RXQ_MAXNDESCS; + max_entries = encp->enc_rxq_max_ndescs; SFC_ASSERT(rte_is_power_of_2(max_entries)); rxq_info->max_entries = max_entries;