From patchwork Mon Apr 8 03:02:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Yang X-Patchwork-Id: 52380 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 00D034F93; Mon, 8 Apr 2019 05:01:20 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by dpdk.org (Postfix) with ESMTP id D41D74CA7 for ; Mon, 8 Apr 2019 05:01:13 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4C77A1993; Sun, 7 Apr 2019 20:01:13 -0700 (PDT) Received: from phil-VirtualBox.shanghai.arm.com (unknown [10.169.108.140]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C31043F718; Sun, 7 Apr 2019 20:01:11 -0700 (PDT) From: Phil Yang To: dev@dpdk.org, thomas@monjalon.net Cc: david.hunt@intel.com, reshma.pattan@intel.com, gavin.hu@arm.com, honnappa.nagarahalli@arm.com, phil.yang@arm.com, nd@arm.com Date: Mon, 8 Apr 2019 11:02:31 +0800 Message-Id: <1554692551-28275-4-git-send-email-phil.yang@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1554692551-28275-1-git-send-email-phil.yang@arm.com> References: <1554692551-28275-1-git-send-email-phil.yang@arm.com> In-Reply-To: <1546508946-12552-1-git-send-email-phil.yang@arm.com> References: <1546508946-12552-1-git-send-email-phil.yang@arm.com> Subject: [dpdk-dev] [PATCH v4 3/3] test/ring_perf: replace sync builtins with atomic builtins X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" '__sync' built-in functions are deprecated, should use the '__atomic' built-in instead. the sync built-in functions are full barriers, while atomic built-in functions offer less restrictive one-way barriers, which help performance. Here is the example test result on TX2: sudo ./arm64-armv8a-linuxapp-gcc/app/test -c 0x7fffffe \ -n 4 --socket-mem=1024,0 --file-prefix=~ -- -i RTE>>ring_perf_autotest *** ring_perf_autotest without this patch *** SP/SC bulk enq/dequeue (size: 8): 6.22 MP/MC bulk enq/dequeue (size: 8): 11.50 SP/SC bulk enq/dequeue (size: 32): 1.85 MP/MC bulk enq/dequeue (size: 32): 2.66 *** ring_perf_autotest with this patch *** SP/SC bulk enq/dequeue (size: 8): 6.13 MP/MC bulk enq/dequeue (size: 8): 9.83 SP/SC bulk enq/dequeue (size: 32): 1.96 MP/MC bulk enq/dequeue (size: 32): 2.30 So for the ring performance test, this patch improved 11% of ring operations performance. Signed-off-by: Phil Yang Reviewed-by: Gavin Hu Reviewed-by: Joyce Kong Reviewed-by: Dharmik Thakkar --- app/test/test_ring_perf.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/app/test/test_ring_perf.c b/app/test/test_ring_perf.c index ebb3939..e851c1a 100644 --- a/app/test/test_ring_perf.c +++ b/app/test/test_ring_perf.c @@ -160,7 +160,11 @@ enqueue_bulk(void *p) unsigned i; void *burst[MAX_BURST] = {0}; - if ( __sync_add_and_fetch(&lcore_count, 1) != 2 ) +#ifdef RTE_USE_C11_MEM_MODEL + if (__atomic_add_fetch(&lcore_count, 1, __ATOMIC_RELAXED) != 2) +#else + if (__sync_add_and_fetch(&lcore_count, 1) != 2) +#endif while(lcore_count != 2) rte_pause(); @@ -196,7 +200,11 @@ dequeue_bulk(void *p) unsigned i; void *burst[MAX_BURST] = {0}; - if ( __sync_add_and_fetch(&lcore_count, 1) != 2 ) +#ifdef RTE_USE_C11_MEM_MODEL + if (__atomic_add_fetch(&lcore_count, 1, __ATOMIC_RELAXED) != 2) +#else + if (__sync_add_and_fetch(&lcore_count, 1) != 2) +#endif while(lcore_count != 2) rte_pause();