diff mbox series

[4/4] test: fix memory barrier test failure on power CPUs

Message ID 1556663603-39934-1-git-send-email-drc@linux.vnet.ibm.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [1/4] test: fix typo in print statement |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

David Christensen April 30, 2019, 10:33 p.m. UTC 
  The memory barrier test fails on IBM Power 9 systems.  Add additional
barriers to accommodate the weakly ordered model used on Power CPUs.

Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
---
 app/test/test_barrier.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

Comments

Thomas Monjalon May 2, 2019, 9:45 p.m. UTC | #1 
Hi,

01/05/2019 00:33, David Christensen:
> The memory barrier test fails on IBM Power 9 systems.  Add additional
> barriers to accommodate the weakly ordered model used on Power CPUs.
> 
> Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
[...]
> --- a/app/test/test_barrier.c
> +++ b/app/test/test_barrier.c
> @@ -36,7 +36,7 @@
>  #include "test.h"
>  
>  #define ADD_MAX		8
> -#define ITER_MAX	0x100000000
> +#define ITER_MAX	0x1000000

This is a revert of a change done in patch 3.

> @@ -92,12 +92,19 @@ struct lcore_plock_test {
>  	other = self ^ 1;
>  
>  	l->flag[self] = 1;
> +#ifdef RTE_ARCH_PPC_64
> +	rte_smp_wmb();
> +#endif

You should not have such #ifdef in a test case
supposed to run on all architectures with the same code.
What can be fixed in EAL?
David Christensen May 6, 2019, 6:26 p.m. UTC | #2 
>> -#define ITER_MAX	0x100000000
>> +#define ITER_MAX	0x1000000
>
> This is a revert of a change done in patch 3.

I'll fix and resubmit.

>> @@ -92,12 +92,19 @@ struct lcore_plock_test {
>>   	other = self ^ 1;
>>
>>   	l->flag[self] = 1;
>> +#ifdef RTE_ARCH_PPC_64
>> +	rte_smp_wmb();
>> +#endif
>
> You should not have such #ifdef in a test case
> supposed to run on all architectures with the same code.
> What can be fixed in EAL?

I'll go ahead and remove the ifdefs since the code for rte_smp_wmb() 
resolves to different architecture specific code (compiler memory 
barriers in the x86 case).

Dave
diff mbox series

Patch

diff --git a/app/test/test_barrier.c b/app/test/test_barrier.c
index 58a3280..6136ee1 100644
--- a/app/test/test_barrier.c
+++ b/app/test/test_barrier.c
@@ -36,7 +36,7 @@ 
 #include "test.h"
 
 #define ADD_MAX		8
-#define ITER_MAX	0x100000000
+#define ITER_MAX	0x1000000
 
 enum plock_use_type {
 	USE_MB,
@@ -92,12 +92,19 @@  struct lcore_plock_test {
 	other = self ^ 1;
 
 	l->flag[self] = 1;
+#ifdef RTE_ARCH_PPC_64
+	rte_smp_wmb();
+#endif
 	l->victim = self;
 
 	store_load_barrier(l->utype);
 
 	while (l->flag[other] == 1 && l->victim == self)
 		rte_pause();
+
+#ifdef RTE_ARCH_PPC_64
+	rte_smp_rmb();
+#endif
 }
 
 static void