From patchwork Wed May 8 21:02:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Christensen X-Patchwork-Id: 53332 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6897E4CC3; Wed, 8 May 2019 23:02:51 +0200 (CEST) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by dpdk.org (Postfix) with ESMTP id 502F34C8F for ; Wed, 8 May 2019 23:02:50 +0200 (CEST) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x48Kr6p5016580 for ; Wed, 8 May 2019 17:02:49 -0400 Received: from e13.ny.us.ibm.com (e13.ny.us.ibm.com [129.33.205.203]) by mx0a-001b2d01.pphosted.com with ESMTP id 2sc6289u4x-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 08 May 2019 17:02:49 -0400 Received: from localhost by e13.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 8 May 2019 22:02:48 +0100 Received: from b01cxnp23033.gho.pok.ibm.com (9.57.198.28) by e13.ny.us.ibm.com (146.89.104.200) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 8 May 2019 22:02:46 +0100 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x48L2jSI27984006 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 8 May 2019 21:02:45 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B3A7DB2065; Wed, 8 May 2019 21:02:45 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7B5FFB2064; Wed, 8 May 2019 21:02:45 +0000 (GMT) Received: from oprom9.localdomain (unknown [9.40.204.34]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 8 May 2019 21:02:45 +0000 (GMT) From: David Christensen To: dev@dpdk.org Cc: David Christensen Date: Wed, 8 May 2019 16:02:43 -0500 X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 x-cbid: 19050821-0064-0000-0000-000003DBB94C X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011072; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000285; SDB=6.01200514; UDB=6.00629910; IPR=6.00981401; MB=3.00026797; MTD=3.00000008; XFM=3.00000015; UTC=2019-05-08 21:02:47 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19050821-0065-0000-0000-00003D651CC6 Message-Id: <1557349363-26213-1-git-send-email-drc@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-08_12:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=773 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1905080127 Subject: [dpdk-dev] [PATCH v3 4/4] test: fix memory barrier test failure on power CPUs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The memory barrier test fails on IBM Power 9 systems. Add additional barriers to accommodate the weakly ordered model used on Power CPUs. Signed-off-by: David Christensen --- v2: * Removed ifdef's for PPC since the rte_smp_*mb() macros are already customized for each CPU architecture v3: * None --- app/test/test_barrier.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/app/test/test_barrier.c b/app/test/test_barrier.c index a0b4704..43b5f62 100644 --- a/app/test/test_barrier.c +++ b/app/test/test_barrier.c @@ -92,12 +92,14 @@ struct lcore_plock_test { other = self ^ 1; l->flag[self] = 1; + rte_smp_wmb(); l->victim = self; store_load_barrier(l->utype); while (l->flag[other] == 1 && l->victim == self) rte_pause(); + rte_smp_rmb(); } static void