From patchwork Wed Jul 24 12:59:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 57020 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 34C611C1ED; Wed, 24 Jul 2019 14:59:29 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 13A8D1C1DA; Wed, 24 Jul 2019 14:59:22 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us2.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id 9B9C0A40064; Wed, 24 Jul 2019 12:59:20 +0000 (UTC) Received: from ocex03.SolarFlarecom.com (10.20.40.36) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 24 Jul 2019 05:59:17 -0700 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Wed, 24 Jul 2019 05:59:16 -0700 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id x6OCxFIR001010; Wed, 24 Jul 2019 13:59:15 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id AAED61613C5; Wed, 24 Jul 2019 13:59:15 +0100 (BST) From: Andrew Rybchenko To: CC: Date: Wed, 24 Jul 2019 13:59:05 +0100 Message-ID: <1563973146-16577-3-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1563973146-16577-1-git-send-email-arybchenko@solarflare.com> References: <1563973146-16577-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24792.002 X-TM-AS-Result: No-0.492900-4.000000-10 X-TMASE-MatchedRID: HIoH5j4GqUDwkLAKwBnPlvDrY9Cr30dZaV/UQ+pZUx8ZwGrh4y4izAoe RRhCZWIBuA9fFHhyLzwUEDo1iEscxZMKhvRh/ZfePwKTD1v8YV5MkOX0UoduuUkrZ4mFjTbD5z2 5NZlW0T3an9ppH+fHTtK1oiVNECWQFN9ZmagPwX/robZps+Pq2H0tCKdnhB589yM15V5aWpj6C0 ePs7A07ezHZYTfB1+V5TGLMhlwMWKKhmwg4CFeDTTIVXuesBrpGplhzBrWgUWR6FrilhmEyhBk9 jsRU+103voZ0FpFhrfjDQn0m0dz8uqGfVj1aNV92kC7SwvGlKhDwb7Jglhh1lFkOwaJdCKgviPE qcclEtxVyvbTg/runA== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10-0.492900-4.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24792.002 X-MDID: 1563973161-kyNlvvFqYZry Subject: [dpdk-dev] [PATCH 2/3] net/sfc: fix align to power of 2 when align has smaller type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Substitute driver-defined P2ALIGN() with EFX_P2ALIGN() defined in libefx. Cast value and alignment to one specified type to guarantee result correctness. Fixes: e1b944598579 ("net/sfc: build libefx") Cc: stable@dpdk.org Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_rx.c | 2 +- drivers/net/sfc/base/efx.h | 6 +++++- drivers/net/sfc/efsys.h | 4 ---- drivers/net/sfc/sfc_rx.c | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c index b087a5d42..bb4489bbf 100644 --- a/drivers/net/sfc/base/ef10_rx.c +++ b/drivers/net/sfc/base/ef10_rx.c @@ -859,7 +859,7 @@ ef10_rx_qpush( efx_dword_t dword; /* Hardware has alignment restriction for WPTR */ - wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN); + wptr = EFX_P2ALIGN(unsigned int, added, EF10_RX_WPTR_ALIGN); if (pushed == wptr) return; diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h index 42195cc9d..6aff68b54 100644 --- a/drivers/net/sfc/base/efx.h +++ b/drivers/net/sfc/base/efx.h @@ -29,10 +29,14 @@ extern "C" { /* The macro expands divider twice */ #define EFX_DIV_ROUND_UP(_n, _d) (((_n) + (_d) - 1) / (_d)) -/* Round size up to nearest power of two. */ +/* Round value up to the nearest power of two. */ #define EFX_P2ROUNDUP(_type, _value, _align) \ (-(-(_type)(_value) & -(_type)(_align))) +/* Align value down to the nearest power of two. */ +#define EFX_P2ALIGN(_type, _value, _align) \ + ((_type)(_value) & -(_type)(_align)) + /* Return codes */ typedef __success(return == 0) int efx_rc_t; diff --git a/drivers/net/sfc/efsys.h b/drivers/net/sfc/efsys.h index 4c122d040..79fd3c144 100644 --- a/drivers/net/sfc/efsys.h +++ b/drivers/net/sfc/efsys.h @@ -76,10 +76,6 @@ typedef bool boolean_t; #define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0) #endif -#ifndef P2ALIGN -#define P2ALIGN(_x, _a) ((_x) & -(_a)) -#endif - #ifndef ISP2 #define ISP2(x) rte_is_power_of_2(x) #endif diff --git a/drivers/net/sfc/sfc_rx.c b/drivers/net/sfc/sfc_rx.c index 23dff0967..e6809bb64 100644 --- a/drivers/net/sfc/sfc_rx.c +++ b/drivers/net/sfc/sfc_rx.c @@ -1019,7 +1019,7 @@ sfc_rx_mb_pool_buf_size(struct sfc_adapter *sa, struct rte_mempool *mb_pool) * Start is aligned the same or better than end, * just align length. */ - buf_size = P2ALIGN(buf_size, nic_align_end); + buf_size = EFX_P2ALIGN(uint32_t, buf_size, nic_align_end); } return buf_size;