From patchwork Wed Jul 24 13:08:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 57023 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 28D9D1C206; Wed, 24 Jul 2019 15:08:22 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 14E511C1E1; Wed, 24 Jul 2019 15:08:17 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us3.ppe-hosted.com (PPE Hosted ESMTP Server) with ESMTPS id DBB616C0072; Wed, 24 Jul 2019 13:08:15 +0000 (UTC) Received: from ocex03.SolarFlarecom.com (10.20.40.36) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 24 Jul 2019 06:08:13 -0700 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Wed, 24 Jul 2019 06:08:12 -0700 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id x6OD8B8i014051; Wed, 24 Jul 2019 14:08:11 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id B362A1613C5; Wed, 24 Jul 2019 14:08:11 +0100 (BST) From: Andrew Rybchenko To: CC: Date: Wed, 24 Jul 2019 14:08:04 +0100 Message-ID: <1563973684-24127-3-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1563973684-24127-1-git-send-email-arybchenko@solarflare.com> References: <1563973146-16577-1-git-send-email-arybchenko@solarflare.com> <1563973684-24127-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24792.002 X-TM-AS-Result: No-1.178100-4.000000-10 X-TMASE-MatchedRID: HGvy3W1xOqYkVMQcdgU2qX41AgV24XnfNV9S7O+u3KapUxQxmTD4Ql1Z yX1veeaJjI6htSLqAVws/31GzKkTsbf0EuHoGRzunFVnNmvv47tLXPA26IG0hN9RlPzeVuQQanE x6Q9PkPCho5hw7szEX5D+pKew+B5XkLQe3uHqwd2YHemjphKeGweCHewokHM/SObQxqJYOuNsnN UnNbVtKvxRYvlIka/iq5xoQ6tCQVMO0e7Jo0bskp4CIKY/Hg3AGdQnQSTrKGPEQdG7H66TyKsQd 9qPXhnJtN4e7Xto9X5iNCWzSLoIr4/yfrG9RxmRoVc8c0NSfUvqGc3taHoKneQm1e6xrePWYULw cetLBFRqKoasPfGPInIDAbxao7edGLgavUiGnSzaQLtLC8aUqEPBvsmCWGHWUWQ7Bol0IqAY5tv H9Ry2Nw== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.178100-4.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24792.002 X-MDID: 1563973696-C9-DtclDJmEw Subject: [dpdk-dev] [PATCH v2 3/3] net/sfc: unify power of 2 alignment check macro X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Substitute driver-defined IS_P2ALIGNED() with EFX_IS_P2ALIGNED() defined in libefx. Add type argument and cast value and alignment to one specified type. Fixes: e1b944598579 ("net/sfc: build libefx") Cc: stable@dpdk.org Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_rx.c | 4 ++-- drivers/net/sfc/base/efx.h | 4 ++++ drivers/net/sfc/efsys.h | 43 +++++++++++++++++++--------------- 3 files changed, 30 insertions(+), 21 deletions(-) diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c index bb4489bbf..5f5dd3c62 100644 --- a/drivers/net/sfc/base/ef10_rx.c +++ b/drivers/net/sfc/base/ef10_rx.c @@ -1119,12 +1119,12 @@ ef10_rx_qcreate( rc = ENOTSUP; goto fail9; } - if (!IS_P2ALIGNED(es_max_dma_len, + if (!EFX_IS_P2ALIGNED(uint32_t, es_max_dma_len, EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) { rc = EINVAL; goto fail10; } - if (!IS_P2ALIGNED(es_buf_stride, + if (!EFX_IS_P2ALIGNED(uint32_t, es_buf_stride, EFX_RX_ES_SUPER_BUFFER_BUF_ALIGNMENT)) { rc = EINVAL; goto fail11; diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h index 6aff68b54..53ddaa987 100644 --- a/drivers/net/sfc/base/efx.h +++ b/drivers/net/sfc/base/efx.h @@ -37,6 +37,10 @@ extern "C" { #define EFX_P2ALIGN(_type, _value, _align) \ ((_type)(_value) & -(_type)(_align)) +/* Test if value is power of 2 aligned. */ +#define EFX_IS_P2ALIGNED(_type, _value, _align) \ + ((((_type)(_value)) & ((_type)(_align) - 1)) == 0) + /* Return codes */ typedef __success(return == 0) int efx_rc_t; diff --git a/drivers/net/sfc/efsys.h b/drivers/net/sfc/efsys.h index 79fd3c144..eab5479a4 100644 --- a/drivers/net/sfc/efsys.h +++ b/drivers/net/sfc/efsys.h @@ -69,13 +69,6 @@ typedef bool boolean_t; #define MIN(v1, v2) ((v1) < (v2) ? (v1) : (v2)) #endif -/* There are macros for alignment in DPDK, but we need to make a proper - * correspondence here, if we want to re-use them at all - */ -#ifndef IS_P2ALIGNED -#define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0) -#endif - #ifndef ISP2 #define ISP2(x) rte_is_power_of_2(x) #endif @@ -231,7 +224,8 @@ typedef struct efsys_mem_s { volatile uint32_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_dword_t))); \ \ _addr = (volatile uint32_t *)(_base + (_offset)); \ (_edp)->ed_u32[0] = _addr[0]; \ @@ -248,7 +242,8 @@ typedef struct efsys_mem_s { volatile uint64_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_qword_t))); \ \ _addr = (volatile uint64_t *)(_base + (_offset)); \ (_eqp)->eq_u64[0] = _addr[0]; \ @@ -266,7 +261,8 @@ typedef struct efsys_mem_s { volatile __m128i *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_oword_t))); \ \ _addr = (volatile __m128i *)(_base + (_offset)); \ (_eop)->eo_u128[0] = _addr[0]; \ @@ -287,7 +283,8 @@ typedef struct efsys_mem_s { volatile uint32_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_dword_t))); \ \ EFSYS_PROBE2(mem_writed, unsigned int, (_offset), \ uint32_t, (_edp)->ed_u32[0]); \ @@ -304,7 +301,8 @@ typedef struct efsys_mem_s { volatile uint64_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_qword_t))); \ \ EFSYS_PROBE3(mem_writeq, unsigned int, (_offset), \ uint32_t, (_eqp)->eq_u32[1], \ @@ -322,7 +320,8 @@ typedef struct efsys_mem_s { volatile __m128i *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_oword_t))); \ \ \ EFSYS_PROBE5(mem_writeo, unsigned int, (_offset), \ @@ -387,7 +386,8 @@ typedef struct efsys_bar_s { volatile uint32_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_dword_t))); \ _NOTE(CONSTANTCONDITION); \ if (_lock) \ SFC_BAR_LOCK(_esbp); \ @@ -411,7 +411,8 @@ typedef struct efsys_bar_s { volatile uint64_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_qword_t))); \ \ SFC_BAR_LOCK(_esbp); \ \ @@ -433,7 +434,8 @@ typedef struct efsys_bar_s { volatile __m128i *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_oword_t))); \ \ _NOTE(CONSTANTCONDITION); \ if (_lock) \ @@ -463,7 +465,8 @@ typedef struct efsys_bar_s { volatile uint32_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_dword_t))); \ \ _NOTE(CONSTANTCONDITION); \ if (_lock) \ @@ -488,7 +491,8 @@ typedef struct efsys_bar_s { volatile uint64_t *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_qword_t))); \ \ SFC_BAR_LOCK(_esbp); \ \ @@ -522,7 +526,8 @@ typedef struct efsys_bar_s { volatile __m128i *_addr; \ \ _NOTE(CONSTANTCONDITION); \ - SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \ + SFC_ASSERT(EFX_IS_P2ALIGNED(size_t, _offset, \ + sizeof(efx_oword_t))); \ \ _NOTE(CONSTANTCONDITION); \ if (_lock) \