[v8,3/4] common/qat: use WC store to update queue tail registers
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Commit Message
Performance improvement: use a write combining store
instead of a regular mmio write to update queue tail
registers.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
drivers/common/qat/qat_adf/adf_transport_access_macros.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
Comments
> -----Original Message-----
> From: Nicolau, Radu <radu.nicolau@intel.com>
> Sent: Friday, July 17, 2020 11:50 AM
> To: dev@dpdk.org
> Cc: Xing, Beilei <beilei.xing@intel.com>; Guo, Jia <jia.guo@intel.com>; Richardson, Bruce
> <bruce.richardson@intel.com>; Ananyev, Konstantin <konstantin.ananyev@intel.com>;
> jerinjacobk@gmail.com; david.marchand@redhat.com; Trahe, Fiona <fiona.trahe@intel.com>; Zhao1,
> Wei <wei.zhao1@intel.com>; ruifeng.wang@arm.com; Nicolau, Radu <radu.nicolau@intel.com>
> Subject: [PATCH v8 3/4] common/qat: use WC store to update queue tail registers
>
> Performance improvement: use a write combining store
> instead of a regular mmio write to update queue tail
> registers.
>
> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
@@ -9,6 +9,8 @@
/* CSR write macro */
#define ADF_CSR_WR(csrAddr, csrOffset, val) \
rte_write32(val, (((uint8_t *)csrAddr) + csrOffset))
+#define ADF_CSR_WC_WR(csrAddr, csrOffset, val) \
+ rte_write32_wc(val, (((uint8_t *)csrAddr) + csrOffset))
/* CSR read macro */
#define ADF_CSR_RD(csrAddr, csrOffset) \
@@ -110,10 +112,10 @@ do { \
ADF_RING_CSR_RING_UBASE + (ring << 2), u_base); \
} while (0)
#define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \
- ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
+ ADF_CSR_WC_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
ADF_RING_CSR_RING_HEAD + (ring << 2), value)
#define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \
- ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
+ ADF_CSR_WC_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
ADF_RING_CSR_RING_TAIL + (ring << 2), value)
#define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \
do { \