[03/11] common/cnxk: add mbox to configure RXC

Message ID 1622649385-22652-4-git-send-email-anoobj@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series Add CPT in Marvell CNXK common driver |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Anoob Joseph June 2, 2021, 3:56 p.m. UTC
  From: Vidya Sagar Velumuri <vvelumuri@marvell.com>

Add mailbox to configure tiemouts and thresholds in
CPT RXC unit.

Signed-off-by: Aakash Sasidharan <asasidharan@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>

---
 drivers/common/cnxk/roc_cpt.c   | 27 +++++++++++++++++++++++++++
 drivers/common/cnxk/roc_cpt.h   | 10 ++++++++++
 drivers/common/cnxk/version.map |  1 +
 3 files changed, 38 insertions(+)
  

Patch

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 3c0683c..11d8b9d 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -5,6 +5,33 @@ 
 #include "roc_api.h"
 #include "roc_priv.h"
 
+int
+roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg)
+{
+	struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
+	struct cpt_rxc_time_cfg_req *req;
+	struct dev *dev = &cpt->dev;
+
+	req = mbox_alloc_msg_cpt_rxc_time_cfg(dev->mbox);
+	if (req == NULL)
+		return -ENOSPC;
+
+	req->blkaddr = 0;
+
+	/* The step value is in microseconds. */
+	req->step = cfg->step;
+
+	/* The timeout will be: limit * step microseconds */
+	req->zombie_limit = cfg->zombie_limit;
+	req->zombie_thres = cfg->zombie_thres;
+
+	/* The timeout will be: limit * step microseconds */
+	req->active_limit = cfg->active_limit;
+	req->active_thres = cfg->active_thres;
+
+	return mbox_process(dev->mbox);
+}
+
 static int
 cpt_get_msix_offset(struct dev *dev, struct msix_offset_rsp **msix_rsp)
 {
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 2630955..5b84ec5 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -23,6 +23,16 @@  struct roc_cpt {
 	uint8_t reserved[ROC_CPT_MEM_SZ] __plt_cache_aligned;
 } __plt_cache_aligned;
 
+struct roc_cpt_rxc_time_cfg {
+	uint32_t step;
+	uint16_t active_limit;
+	uint16_t active_thres;
+	uint16_t zombie_limit;
+	uint16_t zombie_thres;
+};
+
+int __roc_api roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt,
+				   struct roc_cpt_rxc_time_cfg *cfg);
 int __roc_api roc_cpt_dev_init(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_dev_fini(struct roc_cpt *roc_cpt);
 int __roc_api roc_cpt_eng_grp_add(struct roc_cpt *roc_cpt,
diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map
index f8e286e..1dbeebe 100644
--- a/drivers/common/cnxk/version.map
+++ b/drivers/common/cnxk/version.map
@@ -16,6 +16,7 @@  INTERNAL {
 	roc_cpt_dev_fini;
 	roc_cpt_dev_init;
 	roc_cpt_eng_grp_add;
+	roc_cpt_rxc_time_cfg;
 	roc_error_msg_get;
 	roc_idev_lmt_base_addr_get;
 	roc_idev_npa_maxpools_get;