From patchwork Mon Dec 13 04:29:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Pei, Andy" X-Patchwork-Id: 105078 X-Patchwork-Delegate: maxime.coquelin@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E56D2A0032; Mon, 13 Dec 2021 06:15:09 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0763C41104; Mon, 13 Dec 2021 06:15:09 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id F32BA41101 for ; Mon, 13 Dec 2021 06:15:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1639372507; x=1670908507; h=from:to:cc:subject:date:message-id; bh=zHAeyJr7KjAOnoirBwwRuDZrWTw9M4iKMPuVIaadGc0=; b=IxeLYJ0CxFqNX0ZYlBl5u/5lbt7P5WmPe1hn/lJp1w7cqzT7rNh6q58S /uVNLmsOOqw0JPwVT885Zn4ENY6r0JIEKrNlpQath6hAP0N4F0E/t6vD9 M3qRTlLUhxLG9DZp8Y3MElCTdDvgA155j3L4B9KJEhymA5Dc3tB3kntcB 6W63SXW495H70xvbadCULp4Eos47CEXRgz8X/ybOWeLZ3jnmCGTjQF2Dz 5yRXM1ojN3SO1OHjMJ2fzRAX8Cig5BayGBXkKYo0HJ2mCb4p9JBNfG48z CDcR0kY3bktsjIgib9+5DEevALjESMq5YcjHk2W2d8yOBG/QqOGiyK0ZA Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10196"; a="262788026" X-IronPort-AV: E=Sophos;i="5.88,201,1635231600"; d="scan'208";a="262788026" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2021 21:15:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.88,201,1635231600"; d="scan'208";a="613694155" Received: from dpdk-dipei.sh.intel.com ([10.67.111.91]) by orsmga004.jf.intel.com with ESMTP; 12 Dec 2021 21:15:04 -0800 From: Andy Pei To: dev@dpdk.org Cc: andy.pei@intel.com, chenbo.xia@intel.com, xiao.w.wang@intel.com Subject: [PATCH 2/3] vdpa/ifc: check lm_cfg is not NULL before use lm_cfg Date: Mon, 13 Dec 2021 12:29:16 +0800 Message-Id: <1639369756-103116-1-git-send-email-andy.pei@intel.com> X-Mailer: git-send-email 1.8.3.1 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org check lm_cfg is not NULL before use lm_cfg. when init hardware, if lm_cfg is NULL, output some debug information. Signed-off-by: Andy Pei --- drivers/vdpa/ifc/base/ifcvf.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/vdpa/ifc/base/ifcvf.c b/drivers/vdpa/ifc/base/ifcvf.c index d10c1fd..b9b061f 100644 --- a/drivers/vdpa/ifc/base/ifcvf.c +++ b/drivers/vdpa/ifc/base/ifcvf.c @@ -87,6 +87,8 @@ } hw->lm_cfg = hw->mem_resource[4].addr; + if (!hw->lm_cfg) + DEBUGOUT("HW mem_resource[4] is NULL, so lm_cfg is NULL.\n"); if (hw->common_cfg == NULL || hw->notify_base == NULL || hw->isr == NULL || hw->dev_cfg == NULL) { @@ -218,10 +220,13 @@ &cfg->queue_used_hi); IFCVF_WRITE_REG16(hw->vring[i].size, &cfg->queue_size); - *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET + - (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4) = - (u32)hw->vring[i].last_avail_idx | - ((u32)hw->vring[i].last_used_idx << 16); + if (lm_cfg != NULL) { + *(u32 *)(lm_cfg + IFCVF_LM_RING_STATE_OFFSET + + (i / 2) * IFCVF_LM_CFG_SIZE + + (i % 2) * 4) = + (u32)hw->vring[i].last_avail_idx | + ((u32)hw->vring[i].last_used_idx << 16); + } IFCVF_WRITE_REG16(i + 1, &cfg->queue_msix_vector); if (IFCVF_READ_REG16(&cfg->queue_msix_vector) == @@ -254,10 +259,14 @@ IFCVF_WRITE_REG16(i, &cfg->queue_select); IFCVF_WRITE_REG16(0, &cfg->queue_enable); IFCVF_WRITE_REG16(IFCVF_MSI_NO_VECTOR, &cfg->queue_msix_vector); - ring_state = *(u32 *)(hw->lm_cfg + IFCVF_LM_RING_STATE_OFFSET + - (i / 2) * IFCVF_LM_CFG_SIZE + (i % 2) * 4); - hw->vring[i].last_avail_idx = (u16)(ring_state >> 16); - hw->vring[i].last_used_idx = (u16)(ring_state >> 16); + if (hw->lm_cfg != NULL) { + ring_state = *(u32 *)(hw->lm_cfg + + IFCVF_LM_RING_STATE_OFFSET + + (i / 2) * IFCVF_LM_CFG_SIZE + + (i % 2) * 4); + hw->vring[i].last_avail_idx = (u16)(ring_state >> 16); + hw->vring[i].last_used_idx = (u16)(ring_state >> 16); + } } } @@ -292,6 +301,9 @@ lm_cfg = hw->lm_cfg; + if (lm_cfg == NULL) + return; + *(u32 *)(lm_cfg + IFCVF_LM_BASE_ADDR_LOW) = log_base & IFCVF_32_BIT_MASK; @@ -313,6 +325,10 @@ u8 *lm_cfg; lm_cfg = hw->lm_cfg; + + if (lm_cfg == NULL) + return; + *(u32 *)(lm_cfg + IFCVF_LM_LOGGING_CTRL) = IFCVF_LM_DISABLE; }