From patchwork Thu May 26 00:55:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 111869 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 69FE0A0548; Thu, 26 May 2022 03:04:53 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EA46242B6D; Thu, 26 May 2022 03:04:32 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 8CE4040150 for ; Thu, 26 May 2022 03:04:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653527068; x=1685063068; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=qz7cl5cAeiostfqsmc8K0TOFKiOW5752fz69WVYUqtY=; b=kwovt/Sus/5vUUUoN5D0pge0v1fwD1xoIGrt1KNfy60VIKnIjlN5BU4V BkV27UV9z8px8AVVuDt+GNd/n/QOo9pv1i3Wm41YWRX/pkp6K6x5xy/RH ybMMmQ+91X+tMHRmkFEdCuc+0Xw122Av531Jy5judJgFduqsSWov/xbJA uTUaUPoaK4SuZThtJST2NXzumpkHVuPyMMcKO6pfNUwJ2JYyQ3gXy86k6 VMarHuT88B66eT6Q++YXiDe0KQMF7Yh9ag2haGAOcGhsDIhptUqICedUR IelEnofw9N288njZ9x8Betet4f1cMuo2zxhYjwa2Trh8z9j2wcmeTyyQu w==; X-IronPort-AV: E=McAfee;i="6400,9594,10358"; a="274089456" X-IronPort-AV: E=Sophos;i="5.91,252,1647327600"; d="scan'208";a="274089456" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 May 2022 18:04:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,252,1647327600"; d="scan'208";a="549294878" Received: from skx-5gnr-sc12-4.sc.intel.com ([172.25.69.210]) by orsmga006.jf.intel.com with ESMTP; 25 May 2022 18:04:24 -0700 From: Nicolas Chautru To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: thomas@monjalon.net, ray.kinsella@intel.com, bruce.richardson@intel.com, hemant.agrawal@nxp.com, hernan.vargas@intel.com, david.marchand@redhat.com, Nicolas Chautru Subject: [PATCH v6 4/5] baseband/acc100: modify validation code for ACC101 Date: Wed, 25 May 2022 17:55:22 -0700 Message-Id: <1653526523-68839-5-git-send-email-nicolas.chautru@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1653526523-68839-1-git-send-email-nicolas.chautru@intel.com> References: <1653350912-53876-1-git-send-email-nicolas.chautru@intel.com> <1653526523-68839-1-git-send-email-nicolas.chautru@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The validation requirement is different for the two devices. Signed-off-by: Nicolas Chautru --- drivers/baseband/acc100/rte_acc100_pmd.c | 47 ++++++++++++++++++++++++-------- 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index 6a2123b..a057edf 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1295,6 +1295,21 @@ RTE_BBDEV_TURBO_HALF_ITERATION_EVEN); } +#ifdef RTE_LIBRTE_BBDEV_DEBUG + +static inline bool +is_acc100(struct acc100_queue *q) +{ + return (q->d->device_variant == ACC100_VARIANT); +} + +static inline bool +validate_op_required(struct acc100_queue *q) +{ + return is_acc100(q); +} +#endif + /* Fill in a frame control word for LDPC decoding. */ static inline void acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw, @@ -2182,8 +2197,10 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validates turbo encoder parameters */ static inline int -validate_enc_op(struct rte_bbdev_enc_op *op) +validate_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_turbo_enc *turbo_enc = &op->turbo_enc; struct rte_bbdev_op_enc_turbo_cb_params *cb = NULL; struct rte_bbdev_op_enc_turbo_tb_params *tb = NULL; @@ -2320,8 +2337,10 @@ static inline uint32_t hq_index(uint32_t offset) } /* Validates LDPC encoder parameters */ static inline int -validate_ldpc_enc_op(struct rte_bbdev_enc_op *op) +validate_ldpc_enc_op(struct rte_bbdev_enc_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_ldpc_enc *ldpc_enc = &op->ldpc_enc; if (op->mempool == NULL) { @@ -2373,8 +2392,10 @@ static inline uint32_t hq_index(uint32_t offset) /* Validates LDPC decoder parameters */ static inline int -validate_ldpc_dec_op(struct rte_bbdev_dec_op *op) +validate_ldpc_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_ldpc_dec *ldpc_dec = &op->ldpc_dec; if (op->mempool == NULL) { @@ -2429,7 +2450,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_enc_op(op) == -1) { + if (validate_enc_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo encoder validation failed"); return -EINVAL; } @@ -2483,7 +2504,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_enc_op(ops[0]) == -1) { + if (validate_ldpc_enc_op(ops[0], q) == -1) { rte_bbdev_log(ERR, "LDPC encoder validation failed"); return -EINVAL; } @@ -2545,7 +2566,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_enc_op(op) == -1) { + if (validate_ldpc_enc_op(op, q) == -1) { rte_bbdev_log(ERR, "LDPC encoder validation failed"); return -EINVAL; } @@ -2602,7 +2623,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_enc_op(op) == -1) { + if (validate_enc_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo encoder validation failed"); return -EINVAL; } @@ -2675,8 +2696,10 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validates turbo decoder parameters */ static inline int -validate_dec_op(struct rte_bbdev_dec_op *op) +validate_dec_op(struct rte_bbdev_dec_op *op, struct acc100_queue *q) { + if (!validate_op_required(q)) + return 0; struct rte_bbdev_op_turbo_dec *turbo_dec = &op->turbo_dec; struct rte_bbdev_op_dec_turbo_cb_params *cb = NULL; struct rte_bbdev_op_dec_turbo_tb_params *tb = NULL; @@ -2822,7 +2845,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_dec_op(op) == -1) { + if (validate_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo decoder validation failed"); return -EINVAL; } @@ -3047,7 +3070,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_dec_op(op) == -1) { + if (validate_ldpc_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "LDPC decoder validation failed"); return -EINVAL; } @@ -3151,7 +3174,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_ldpc_dec_op(op) == -1) { + if (validate_ldpc_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "LDPC decoder validation failed"); return -EINVAL; } @@ -3241,7 +3264,7 @@ static inline uint32_t hq_index(uint32_t offset) #ifdef RTE_LIBRTE_BBDEV_DEBUG /* Validate op structure */ - if (validate_dec_op(op) == -1) { + if (validate_dec_op(op, q) == -1) { rte_bbdev_log(ERR, "Turbo decoder validation failed"); return -EINVAL; }