Adds the vNIC initialization logic for the flower PF vNIC. The flower
firmware application exposes this vNIC for the purposes of fallback
traffic in the switchdev use-case.
Adds minimal dev_ops for this PF vNIC device. Because the device is
being exposed externally to DPDK it needs to implements a minimal set
of dev_ops.
Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>
---
drivers/net/nfp/flower/nfp_flower.c | 143 +++++++++++++++++++++++++++++++++++-
drivers/net/nfp/flower/nfp_flower.h | 2 +
drivers/net/nfp/nfp_common.h | 3 +
3 files changed, 145 insertions(+), 3 deletions(-)
@@ -14,12 +14,96 @@
#include "../nfp_logs.h"
#include "../nfp_ctrl.h"
#include "../nfp_cpp_bridge.h"
+#include "../nfp_rxtx.h"
+#include "../nfpcore/nfp_mip.h"
+#include "../nfpcore/nfp_rtsym.h"
+#include "../nfpcore/nfp_nsp.h"
#include "nfp_flower.h"
+#define DEFAULT_FLBUF_SIZE 9216
+
+static const struct eth_dev_ops nfp_flower_pf_vnic_ops = {
+ .dev_infos_get = nfp_net_infos_get,
+ .link_update = nfp_net_link_update,
+ .dev_configure = nfp_net_configure,
+};
+
+static int
+nfp_flower_init_vnic_common(struct nfp_net_hw *hw, const char *vnic_type)
+{
+ uint32_t start_q;
+ uint64_t rx_bar_off;
+ uint64_t tx_bar_off;
+ const int stride = 4;
+ struct nfp_pf_dev *pf_dev;
+ struct rte_pci_device *pci_dev;
+
+ pf_dev = hw->pf_dev;
+ pci_dev = hw->pf_dev->pci_dev;
+
+ /* NFP can not handle DMA addresses requiring more than 40 bits */
+ if (rte_mem_check_dma_mask(40)) {
+ PMD_INIT_LOG(ERR, "Device %s can not be used: restricted dma mask to 40 bits!\n",
+ pci_dev->device.name);
+ return -ENODEV;
+ };
+
+ hw->device_id = pci_dev->id.device_id;
+ hw->vendor_id = pci_dev->id.vendor_id;
+ hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
+ hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
+
+ PMD_INIT_LOG(DEBUG, "%s vNIC ctrl bar: %p", vnic_type, hw->ctrl_bar);
+
+ /* Read the number of available rx/tx queues from hardware */
+ hw->max_rx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_RXRINGS);
+ hw->max_tx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_TXRINGS);
+
+ /* Work out where in the BAR the queues start */
+ start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ);
+ tx_bar_off = (uint64_t)start_q * NFP_QCP_QUEUE_ADDR_SZ;
+ start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ);
+ rx_bar_off = (uint64_t)start_q * NFP_QCP_QUEUE_ADDR_SZ;
+
+ hw->tx_bar = pf_dev->hw_queues + tx_bar_off;
+ hw->rx_bar = pf_dev->hw_queues + rx_bar_off;
+
+ /* Get some of the read-only fields from the config BAR */
+ hw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION);
+ hw->cap = nn_cfg_readl(hw, NFP_NET_CFG_CAP);
+ hw->max_mtu = nn_cfg_readl(hw, NFP_NET_CFG_MAX_MTU);
+ /* Set the current MTU to the maximum supported */
+ hw->mtu = hw->max_mtu;
+ hw->flbufsz = DEFAULT_FLBUF_SIZE;
+
+ /* read the Rx offset configured from firmware */
+ if (NFD_CFG_MAJOR_VERSION_of(hw->ver) < 2)
+ hw->rx_offset = NFP_NET_RX_OFFSET;
+ else
+ hw->rx_offset = nn_cfg_readl(hw, NFP_NET_CFG_RX_OFFSET_ADDR);
+
+ hw->ctrl = 0;
+ hw->stride_rx = stride;
+ hw->stride_tx = stride;
+
+ /* Reuse cfg queue setup function */
+ nfp_net_cfg_queue_setup(hw);
+
+ PMD_INIT_LOG(INFO, "%s vNIC max_rx_queues: %u, max_tx_queues: %u",
+ vnic_type, hw->max_rx_queues, hw->max_tx_queues);
+
+ /* Initializing spinlock for reconfigs */
+ rte_spinlock_init(&hw->reconfig_lock);
+
+ return 0;
+}
+
int
nfp_init_app_fw_flower(struct nfp_pf_dev *pf_dev)
{
+ int ret;
unsigned int numa_node;
+ struct nfp_net_hw *pf_hw;
struct nfp_app_fw_flower *app_fw_flower;
numa_node = rte_socket_id();
@@ -34,12 +118,65 @@
pf_dev->app_fw_priv = app_fw_flower;
+ /* Allocate memory for the PF AND ctrl vNIC here (hence the * 2) */
+ pf_hw = rte_zmalloc_socket("nfp_pf_vnic", 2 * sizeof(struct nfp_net_adapter),
+ RTE_CACHE_LINE_SIZE, numa_node);
+ if (pf_hw == NULL) {
+ PMD_INIT_LOG(ERR, "Could not malloc nfp pf vnic");
+ ret = -ENOMEM;
+ goto app_cleanup;
+ }
+
+ /* Map the PF ctrl bar */
+ pf_dev->ctrl_bar = nfp_rtsym_map(pf_dev->sym_tbl, "_pf0_net_bar0",
+ 32768, &pf_dev->ctrl_area);
+ if (pf_dev->ctrl_bar == NULL) {
+ PMD_INIT_LOG(ERR, "Cloud not map the PF vNIC ctrl bar");
+ ret = -ENODEV;
+ goto vnic_cleanup;
+ }
+
+ /* Fill in the PF vNIC and populate app struct */
+ app_fw_flower->pf_hw = pf_hw;
+ pf_hw->ctrl_bar = pf_dev->ctrl_bar;
+ pf_hw->pf_dev = pf_dev;
+ pf_hw->cpp = pf_dev->cpp;
+
+ ret = nfp_flower_init_vnic_common(app_fw_flower->pf_hw, "pf_vnic");
+ if (ret != 0) {
+ PMD_INIT_LOG(ERR, "Could not initialize flower PF vNIC");
+ goto pf_cpp_area_cleanup;
+ }
+
return 0;
+
+pf_cpp_area_cleanup:
+ nfp_cpp_area_free(pf_dev->ctrl_area);
+vnic_cleanup:
+ rte_free(pf_hw);
+app_cleanup:
+ rte_free(app_fw_flower);
+
+ return ret;
}
int
-nfp_secondary_init_app_fw_flower(__rte_unused struct nfp_cpp *cpp)
+nfp_secondary_init_app_fw_flower(struct nfp_cpp *cpp)
{
- PMD_INIT_LOG(ERR, "Flower firmware not supported");
- return -ENOTSUP;
+ struct rte_eth_dev *eth_dev;
+ const char *port_name = "pf_vnic_eth_dev";
+
+ PMD_INIT_LOG(DEBUG, "Secondary attaching to port %s", port_name);
+
+ eth_dev = rte_eth_dev_attach_secondary(port_name);
+ if (eth_dev == NULL) {
+ PMD_INIT_LOG(ERR, "Secondary process attach to port %s failed", port_name);
+ return -ENODEV;
+ }
+
+ eth_dev->process_private = cpp;
+ eth_dev->dev_ops = &nfp_flower_pf_vnic_ops;
+ rte_eth_dev_probing_finish(eth_dev);
+
+ return 0;
}
@@ -8,6 +8,8 @@
/* The flower application's private structure */
struct nfp_app_fw_flower {
+ /* Pointer to the PF vNIC */
+ struct nfp_net_hw *pf_hw;
};
int nfp_init_app_fw_flower(struct nfp_pf_dev *pf_dev);
@@ -448,6 +448,9 @@ int nfp_net_rss_hash_conf_get(struct rte_eth_dev *dev,
#define NFP_PRIV_TO_APP_FW_NIC(app_fw_priv)\
((struct nfp_app_fw_nic *)app_fw_priv)
+#define NFP_PRIV_TO_APP_FW_FLOWER(app_fw_priv)\
+ ((struct nfp_app_fw_flower *)app_fw_priv)
+
#endif /* _NFP_COMMON_H_ */
/*
* Local variables: