@@ -273,7 +273,8 @@
static inline void
rte_atomic16_add(rte_atomic16_t *v, int16_t inc)
{
- rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);
+ rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, inc,
+ rte_memory_order_seq_cst);
}
/**
@@ -287,7 +288,8 @@
static inline void
rte_atomic16_sub(rte_atomic16_t *v, int16_t dec)
{
- rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);
+ rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, dec,
+ rte_memory_order_seq_cst);
}
/**
@@ -340,7 +342,8 @@
static inline int16_t
rte_atomic16_add_return(rte_atomic16_t *v, int16_t inc)
{
- return rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;
+ return rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, inc,
+ rte_memory_order_seq_cst) + inc;
}
/**
@@ -360,7 +363,8 @@
static inline int16_t
rte_atomic16_sub_return(rte_atomic16_t *v, int16_t dec)
{
- return rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;
+ return rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, dec,
+ rte_memory_order_seq_cst) - dec;
}
/**
@@ -379,7 +383,8 @@
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
{
- return rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;
+ return rte_atomic_fetch_add_explicit((volatile int16_t __rte_atomic *)&v->cnt, 1,
+ rte_memory_order_seq_cst) + 1 == 0;
}
#endif
@@ -399,7 +404,8 @@ static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
{
- return rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;
+ return rte_atomic_fetch_sub_explicit((volatile int16_t __rte_atomic *)&v->cnt, 1,
+ rte_memory_order_seq_cst) - 1 == 0;
}
#endif
@@ -552,7 +558,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline void
rte_atomic32_add(rte_atomic32_t *v, int32_t inc)
{
- rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);
+ rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, inc,
+ rte_memory_order_seq_cst);
}
/**
@@ -566,7 +573,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline void
rte_atomic32_sub(rte_atomic32_t *v, int32_t dec)
{
- rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);
+ rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, dec,
+ rte_memory_order_seq_cst);
}
/**
@@ -619,7 +627,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline int32_t
rte_atomic32_add_return(rte_atomic32_t *v, int32_t inc)
{
- return rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;
+ return rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, inc,
+ rte_memory_order_seq_cst) + inc;
}
/**
@@ -639,7 +648,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
static inline int32_t
rte_atomic32_sub_return(rte_atomic32_t *v, int32_t dec)
{
- return rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;
+ return rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, dec,
+ rte_memory_order_seq_cst) - dec;
}
/**
@@ -658,7 +668,8 @@ static inline void rte_atomic16_clear(rte_atomic16_t *v)
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
{
- return rte_atomic_fetch_add_explicit(&v->cnt, 1, rte_memory_order_seq_cst) + 1 == 0;
+ return rte_atomic_fetch_add_explicit((volatile int32_t __rte_atomic *)&v->cnt, 1,
+ rte_memory_order_seq_cst) + 1 == 0;
}
#endif
@@ -678,7 +689,8 @@ static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
#ifdef RTE_FORCE_INTRINSICS
static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
{
- return rte_atomic_fetch_sub_explicit(&v->cnt, 1, rte_memory_order_seq_cst) - 1 == 0;
+ return rte_atomic_fetch_sub_explicit((volatile int32_t __rte_atomic *)&v->cnt, 1,
+ rte_memory_order_seq_cst) - 1 == 0;
}
#endif
@@ -884,7 +896,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline void
rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
{
- rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst);
+ rte_atomic_fetch_add_explicit((volatile int64_t __rte_atomic *)&v->cnt, inc,
+ rte_memory_order_seq_cst);
}
#endif
@@ -903,7 +916,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline void
rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
{
- rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst);
+ rte_atomic_fetch_sub_explicit((volatile int64_t __rte_atomic *)&v->cnt, dec,
+ rte_memory_order_seq_cst);
}
#endif
@@ -961,7 +975,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline int64_t
rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
{
- return rte_atomic_fetch_add_explicit(&v->cnt, inc, rte_memory_order_seq_cst) + inc;
+ return rte_atomic_fetch_add_explicit((volatile int64_t __rte_atomic *)&v->cnt, inc,
+ rte_memory_order_seq_cst) + inc;
}
#endif
@@ -985,7 +1000,8 @@ static inline void rte_atomic32_clear(rte_atomic32_t *v)
static inline int64_t
rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
{
- return rte_atomic_fetch_sub_explicit(&v->cnt, dec, rte_memory_order_seq_cst) - dec;
+ return rte_atomic_fetch_sub_explicit((volatile int64_t __rte_atomic *)&v->cnt, dec,
+ rte_memory_order_seq_cst) - dec;
}
#endif
@@ -86,7 +86,8 @@
{
assert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);
- while (rte_atomic_load_explicit(addr, memorder) != expected)
+ while (rte_atomic_load_explicit((volatile uint16_t __rte_atomic *)addr, memorder)
+ != expected)
rte_pause();
}
@@ -96,7 +97,8 @@
{
assert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);
- while (rte_atomic_load_explicit(addr, memorder) != expected)
+ while (rte_atomic_load_explicit((volatile uint32_t __rte_atomic *)addr, memorder)
+ != expected)
rte_pause();
}
@@ -106,7 +108,8 @@
{
assert(memorder == rte_memory_order_acquire || memorder == rte_memory_order_relaxed);
- while (rte_atomic_load_explicit(addr, memorder) != expected)
+ while (rte_atomic_load_explicit((volatile uint64_t __rte_atomic *)addr, memorder)
+ != expected)
rte_pause();
}
@@ -23,9 +23,10 @@
uint64_t val;
/* trigger a write but don't change the value */
- val = rte_atomic_load_explicit((volatile uint64_t *)addr, rte_memory_order_relaxed);
- rte_atomic_compare_exchange_strong_explicit((volatile uint64_t *)addr, &val, val,
- rte_memory_order_relaxed, rte_memory_order_relaxed);
+ val = rte_atomic_load_explicit((volatile uint64_t __rte_atomic *)addr,
+ rte_memory_order_relaxed);
+ rte_atomic_compare_exchange_strong_explicit((volatile uint64_t __rte_atomic *)addr,
+ &val, val, rte_memory_order_relaxed, rte_memory_order_relaxed);
}
static bool wait_supported;