From patchwork Thu Feb 15 06:21:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Retzlaff X-Patchwork-Id: 136802 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9767D43B06; Thu, 15 Feb 2024 07:21:55 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A9550433A0; Thu, 15 Feb 2024 07:21:42 +0100 (CET) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 3598A43386 for ; Thu, 15 Feb 2024 07:21:37 +0100 (CET) Received: by linux.microsoft.com (Postfix, from userid 1086) id 2DBBB207F22C; Wed, 14 Feb 2024 22:21:36 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 2DBBB207F22C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1707978096; bh=idwBNGLP24O1COpMkOmBomJy+h6t5KRHIsQq4cqA7jo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Xex5QpOk6LMmer8Uh7P/0sn1SlFY9NGzW+UclkAvf2sHBFK9bPZz39nkKWSJGH+5X cLVEspanLtNt4M1KoEIeWWa6/K57zrV5vPGzRjdAr141/pXgPHJ9K5MXoEldF3dhhB 7a5xL66D2ldtWRMwO7II/G8KUYW3VTgGJNuovEzo= From: Tyler Retzlaff To: dev@dpdk.org Cc: Ajit Khaparde , Andrew Boyer , Andrew Rybchenko , Bruce Richardson , Chenbo Xia , Chengwen Feng , Dariusz Sosnowski , David Christensen , Hyong Youb Kim , Jerin Jacob , Jie Hai , Jingjing Wu , John Daley , Kevin Laatz , Kiran Kumar K , Konstantin Ananyev , Maciej Czekaj , Matan Azrad , Maxime Coquelin , Nithin Dabilpuram , Ori Kam , Ruifeng Wang , Satha Rao , Somnath Kotur , Suanming Mou , Sunil Kumar Kori , Viacheslav Ovsiienko , Yisen Zhuang , Yuying Zhang , mb@smartsharesystems.com, Tyler Retzlaff Subject: [PATCH v4 03/18] net/i40e: stop using zero sized marker fields Date: Wed, 14 Feb 2024 22:21:05 -0800 Message-Id: <1707978080-28859-4-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1707978080-28859-1-git-send-email-roretzla@linux.microsoft.com> References: <1706657173-26166-1-git-send-email-roretzla@linux.microsoft.com> <1707978080-28859-1-git-send-email-roretzla@linux.microsoft.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Update to reference newly named anonymous union markers supported by standard C and stop referencing zero sized compiler extension markers. Signed-off-by: Tyler Retzlaff --- drivers/net/i40e/i40e_rxtx_vec_altivec.c | 14 ++++++------- drivers/net/i40e/i40e_rxtx_vec_avx2.c | 30 ++++++++++++++-------------- drivers/net/i40e/i40e_rxtx_vec_avx512.c | 32 +++++++++++++++--------------- drivers/net/i40e/i40e_rxtx_vec_common.h | 4 ++-- drivers/net/i40e/i40e_rxtx_vec_neon.c | 16 +++++++-------- drivers/net/i40e/i40e_rxtx_vec_sse.c | 34 ++++++++++++++++---------------- 6 files changed, 65 insertions(+), 65 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx_vec_altivec.c b/drivers/net/i40e/i40e_rxtx_vec_altivec.c index b6b0d38..0941335 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_altivec.c +++ b/drivers/net/i40e/i40e_rxtx_vec_altivec.c @@ -64,11 +64,11 @@ * Data to be rearmed is 6 bytes long. * Though, RX will overwrite ol_flags that are coming next * anyway. So overwrite whole 8 bytes with one load: - * 6 bytes of rearm_data plus first 2 bytes of ol_flags. + * 6 bytes of mbuf_rearm_data plus first 2 bytes of ol_flags. */ - p0 = (uintptr_t)&mb0->rearm_data; + p0 = (uintptr_t)&mb0->mbuf_rearm_data; *(uint64_t *)p0 = rxq->mbuf_initializer; - p1 = (uintptr_t)&mb1->rearm_data; + p1 = (uintptr_t)&mb1->mbuf_rearm_data; *(uint64_t *)p1 = rxq->mbuf_initializer; /* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */ @@ -371,11 +371,11 @@ /* D.3 copy final 3,4 data to rx_pkts */ vec_st(pkt_mb4, 0, (__vector unsigned char *)&rx_pkts[pos + 3] - ->rx_descriptor_fields1 + ->mbuf_rx_descriptor_fields1 ); vec_st(pkt_mb3, 0, (__vector unsigned char *)&rx_pkts[pos + 2] - ->rx_descriptor_fields1 + ->mbuf_rx_descriptor_fields1 ); /* D.2 pkt 1,2 set in_port/nb_seg and remove crc */ @@ -423,10 +423,10 @@ /* D.3 copy final 1,2 data to rx_pkts */ vec_st(pkt_mb2, 0, (__vector unsigned char *)&rx_pkts[pos + 1] - ->rx_descriptor_fields1 + ->mbuf_rx_descriptor_fields1 ); vec_st(pkt_mb1, 0, - (__vector unsigned char *)&rx_pkts[pos]->rx_descriptor_fields1 + (__vector unsigned char *)&rx_pkts[pos]->mbuf_rx_descriptor_fields1 ); desc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl); desc_to_olflags_v(descs, &rx_pkts[pos]); diff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c index f468c1f..bf2570c 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c +++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c @@ -186,13 +186,13 @@ * calls above. */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12); /* Status/Error flag masks */ /* @@ -527,9 +527,9 @@ */ /* check the structure matches expectations */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) != - offsetof(struct rte_mbuf, rearm_data) + 8); - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) != - RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16)); + offsetof(struct rte_mbuf, mbuf_rearm_data) + 8); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) != + RTE_ALIGN(offsetof(struct rte_mbuf, mbuf_rearm_data), 16)); /* build up data and do writes */ __m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5, rearm6, rearm7; @@ -543,10 +543,10 @@ rearm2 = _mm256_permute2f128_si256(rearm2, mb2_3, 0x20); rearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20); /* write to mbuf */ - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data, rearm6); - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data, rearm4); - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data, rearm2); - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data, rearm0); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->mbuf_rearm_data, rearm6); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->mbuf_rearm_data, rearm4); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->mbuf_rearm_data, rearm2); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->mbuf_rearm_data, rearm0); /* repeat for the odd mbufs */ const __m256i odd_flags = _mm256_castsi128_si256( @@ -561,10 +561,10 @@ rearm3 = _mm256_blend_epi32(rearm3, mb2_3, 0xF0); rearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0); /* again write to mbufs */ - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data, rearm7); - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data, rearm5); - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data, rearm3); - _mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data, rearm1); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->mbuf_rearm_data, rearm7); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->mbuf_rearm_data, rearm5); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->mbuf_rearm_data, rearm3); + _mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->mbuf_rearm_data, rearm1); /* extract and record EOP bit */ if (split_packet) { diff --git a/drivers/net/i40e/i40e_rxtx_vec_avx512.c b/drivers/net/i40e/i40e_rxtx_vec_avx512.c index f3050cd..d521281 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_avx512.c +++ b/drivers/net/i40e/i40e_rxtx_vec_avx512.c @@ -175,13 +175,13 @@ * calls above. */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12); /* Status/Error flag masks */ /* mask everything except RSS, flow director and VLAN flags @@ -559,9 +559,9 @@ */ /* check the structure matches expectations */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) != - offsetof(struct rte_mbuf, rearm_data) + 8); - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) != - RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16)); + offsetof(struct rte_mbuf, mbuf_rearm_data) + 8); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) != + RTE_ALIGN(offsetof(struct rte_mbuf, mbuf_rearm_data), 16)); /* build up data and do writes */ __m256i rearm0, rearm1, rearm2, rearm3, rearm4, rearm5, rearm6, rearm7; @@ -580,13 +580,13 @@ rearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20); /* write to mbuf */ _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 6]->rearm_data, rearm6); + ((__m256i *)&rx_pkts[i + 6]->mbuf_rearm_data, rearm6); _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 4]->rearm_data, rearm4); + ((__m256i *)&rx_pkts[i + 4]->mbuf_rearm_data, rearm4); _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 2]->rearm_data, rearm2); + ((__m256i *)&rx_pkts[i + 2]->mbuf_rearm_data, rearm2); _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 0]->rearm_data, rearm0); + ((__m256i *)&rx_pkts[i + 0]->mbuf_rearm_data, rearm0); /* repeat for the odd mbufs */ const __m256i odd_flags = _mm256_castsi128_si256 @@ -606,13 +606,13 @@ rearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0); /* again write to mbufs */ _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 7]->rearm_data, rearm7); + ((__m256i *)&rx_pkts[i + 7]->mbuf_rearm_data, rearm7); _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 5]->rearm_data, rearm5); + ((__m256i *)&rx_pkts[i + 5]->mbuf_rearm_data, rearm5); _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 3]->rearm_data, rearm3); + ((__m256i *)&rx_pkts[i + 3]->mbuf_rearm_data, rearm3); _mm256_storeu_si256 - ((__m256i *)&rx_pkts[i + 1]->rearm_data, rearm1); + ((__m256i *)&rx_pkts[i + 1]->mbuf_rearm_data, rearm1); /* extract and record EOP bit */ if (split_packet) { @@ -826,7 +826,7 @@ free[0] = m; nb_free = 1; for (i = 1; i < n; i++) { - rte_prefetch0(&txep[i + 3].mbuf->cacheline1); + rte_prefetch0(&txep[i + 3].mbuf->mbuf_cacheline1); m = rte_pktmbuf_prefree_seg(txep[i].mbuf); if (likely(m)) { if (likely(m->pool == free[0]->pool)) { diff --git a/drivers/net/i40e/i40e_rxtx_vec_common.h b/drivers/net/i40e/i40e_rxtx_vec_common.h index 8b74563..57c2cd6 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_common.h +++ b/drivers/net/i40e/i40e_rxtx_vec_common.h @@ -197,9 +197,9 @@ mb_def.port = rxq->port_id; rte_mbuf_refcnt_set(&mb_def, 1); - /* prevent compiler reordering: rearm_data covers previous fields */ + /* prevent compiler reordering: mbuf_rearm_data covers previous fields */ rte_compiler_barrier(); - p = (uintptr_t)&mb_def.rearm_data; + p = (uintptr_t)&mb_def.mbuf_rearm_data; rxq->mbuf_initializer = *(uint64_t *)p; rxq->rx_using_sse = 1; return 0; diff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c index d873e30..218c2ee 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_neon.c +++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c @@ -300,10 +300,10 @@ rearm2 = vsetq_lane_u64(vgetq_lane_u32(vlan0, 2), mbuf_init, 1); rearm3 = vsetq_lane_u64(vgetq_lane_u32(vlan0, 3), mbuf_init, 1); - vst1q_u64((uint64_t *)&rx_pkts[0]->rearm_data, rearm0); - vst1q_u64((uint64_t *)&rx_pkts[1]->rearm_data, rearm1); - vst1q_u64((uint64_t *)&rx_pkts[2]->rearm_data, rearm2); - vst1q_u64((uint64_t *)&rx_pkts[3]->rearm_data, rearm3); + vst1q_u64((uint64_t *)&rx_pkts[0]->mbuf_rearm_data, rearm0); + vst1q_u64((uint64_t *)&rx_pkts[1]->mbuf_rearm_data, rearm1); + vst1q_u64((uint64_t *)&rx_pkts[2]->mbuf_rearm_data, rearm2); + vst1q_u64((uint64_t *)&rx_pkts[3]->mbuf_rearm_data, rearm3); } #define PKTLEN_SHIFT 10 @@ -492,13 +492,13 @@ pkt_mb1 = vreinterpretq_u8_u16(tmp); /* D.3 copy final data to rx_pkts */ - vst1q_u8((void *)&rx_pkts[pos + 3]->rx_descriptor_fields1, + vst1q_u8((void *)&rx_pkts[pos + 3]->mbuf_rx_descriptor_fields1, pkt_mb4); - vst1q_u8((void *)&rx_pkts[pos + 2]->rx_descriptor_fields1, + vst1q_u8((void *)&rx_pkts[pos + 2]->mbuf_rx_descriptor_fields1, pkt_mb3); - vst1q_u8((void *)&rx_pkts[pos + 1]->rx_descriptor_fields1, + vst1q_u8((void *)&rx_pkts[pos + 1]->mbuf_rx_descriptor_fields1, pkt_mb2); - vst1q_u8((void *)&rx_pkts[pos]->rx_descriptor_fields1, + vst1q_u8((void *)&rx_pkts[pos]->mbuf_rx_descriptor_fields1, pkt_mb1); desc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl); diff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c b/drivers/net/i40e/i40e_rxtx_vec_sse.c index 9200a23..9380e38 100644 --- a/drivers/net/i40e/i40e_rxtx_vec_sse.c +++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c @@ -318,13 +318,13 @@ /* write the rearm data and the olflags in one write */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, ol_flags) != - offsetof(struct rte_mbuf, rearm_data) + 8); - RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) != - RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16)); - _mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0); - _mm_store_si128((__m128i *)&rx_pkts[1]->rearm_data, rearm1); - _mm_store_si128((__m128i *)&rx_pkts[2]->rearm_data, rearm2); - _mm_store_si128((__m128i *)&rx_pkts[3]->rearm_data, rearm3); + offsetof(struct rte_mbuf, mbuf_rearm_data) + 8); + RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, mbuf_rearm_data) != + RTE_ALIGN(offsetof(struct rte_mbuf, mbuf_rearm_data), 16)); + _mm_store_si128((__m128i *)&rx_pkts[0]->mbuf_rearm_data, rearm0); + _mm_store_si128((__m128i *)&rx_pkts[1]->mbuf_rearm_data, rearm1); + _mm_store_si128((__m128i *)&rx_pkts[2]->mbuf_rearm_data, rearm2); + _mm_store_si128((__m128i *)&rx_pkts[3]->mbuf_rearm_data, rearm3); } #define PKTLEN_SHIFT 10 @@ -377,9 +377,9 @@ * call above. */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8); __m128i dd_check, eop_check; /* nb_pkts has to be floor-aligned to RTE_I40E_DESCS_PER_LOOP */ @@ -427,13 +427,13 @@ * here for completeness in case of future modifications. */ RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, pkt_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 4); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 8); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 10); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 10); RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, hash) != - offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12); + offsetof(struct rte_mbuf, mbuf_rx_descriptor_fields1) + 12); /* Cache is empty -> need to scan the buffer rings, but first move * the next 'n' mbufs into the cache @@ -537,9 +537,9 @@ staterr = _mm_unpacklo_epi32(sterr_tmp1, sterr_tmp2); /* D.3 copy final 3,4 data to rx_pkts */ - _mm_storeu_si128((void *)&rx_pkts[pos+3]->rx_descriptor_fields1, + _mm_storeu_si128((void *)&rx_pkts[pos+3]->mbuf_rx_descriptor_fields1, pkt_mb4); - _mm_storeu_si128((void *)&rx_pkts[pos+2]->rx_descriptor_fields1, + _mm_storeu_si128((void *)&rx_pkts[pos+2]->mbuf_rx_descriptor_fields1, pkt_mb3); /* D.2 pkt 1,2 set in_port/nb_seg and remove crc */ @@ -573,9 +573,9 @@ staterr = _mm_packs_epi32(staterr, zero); /* D.3 copy final 1,2 data to rx_pkts */ - _mm_storeu_si128((void *)&rx_pkts[pos+1]->rx_descriptor_fields1, + _mm_storeu_si128((void *)&rx_pkts[pos+1]->mbuf_rx_descriptor_fields1, pkt_mb2); - _mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1, + _mm_storeu_si128((void *)&rx_pkts[pos]->mbuf_rx_descriptor_fields1, pkt_mb1); desc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl); /* C.4 calc available number of desc */