The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.
For variables standard C11 offers alignas(a) supported by conformant
compilers i.e. both MSVC and GCC.
For types the standard offers no alignment facility that compatibly
interoperates with C and C++ but may be achieved by relocating the
placement of __rte_aligned(a) to the aforementioned location accepted
by all currently supported toolchains.
To allow alignment for both compilers do the following:
* Move __rte_aligned from the end of {struct,union} definitions to
be between {struct,union} and tag.
The placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for all of GCC, LLVM, MSVC compilers building both C and C++.
* Replace use of __rte_aligned(a) on variables/fields with alignas(a).
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
lib/table/rte_swx_table_learner.c | 4 ++--
lib/table/rte_table_acl.c | 3 ++-
lib/table/rte_table_array.c | 7 ++++---
lib/table/rte_table_hash_cuckoo.c | 4 +++-
lib/table/rte_table_hash_ext.c | 3 ++-
lib/table/rte_table_hash_key16.c | 4 +++-
lib/table/rte_table_hash_key32.c | 4 +++-
lib/table/rte_table_hash_key8.c | 4 +++-
lib/table/rte_table_hash_lru.c | 3 ++-
lib/table/rte_table_lpm.c | 3 ++-
lib/table/rte_table_lpm_ipv6.c | 3 ++-
11 files changed, 28 insertions(+), 14 deletions(-)
@@ -145,13 +145,13 @@ struct table_params {
size_t total_size;
};
-struct table {
+struct __rte_cache_aligned table {
/* Table parameters. */
struct table_params params;
/* Table buckets. */
uint8_t buckets[];
-} __rte_cache_aligned;
+};
/* The timeout (in cycles) is stored in the table as a 32-bit value by truncating its least
* significant 32 bits. Therefore, to make sure the time is always advancing when adding the timeout
@@ -2,6 +2,7 @@
* Copyright(c) 2010-2014 Intel Corporation
*/
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -47,7 +48,7 @@ struct rte_table_acl {
uint8_t *acl_rule_memory; /* Memory to store the rules */
/* Memory to store the action table and stack of free entries */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
@@ -2,6 +2,7 @@
* Copyright(c) 2010-2014 Intel Corporation
*/
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -27,7 +28,7 @@
#endif
-struct rte_table_array {
+struct __rte_cache_aligned rte_table_array {
struct rte_table_stats stats;
/* Input parameters */
@@ -39,8 +40,8 @@ struct rte_table_array {
uint32_t entry_pos_mask;
/* Internal table */
- uint8_t array[0] __rte_cache_aligned;
-} __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t array[0];
+};
static void *
rte_table_array_create(void *params, int socket_id, uint32_t entry_size)
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2010-2017 Intel Corporation
*/
+
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -42,7 +44,7 @@ struct rte_table_hash {
struct rte_hash *h_table;
/* Lookup table */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
static int
@@ -2,6 +2,7 @@
* Copyright(c) 2010-2017 Intel Corporation
*/
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -99,7 +100,7 @@ struct rte_table_hash {
uint32_t *bkt_ext_stack;
/* Table memory */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
static int
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2010-2017 Intel Corporation
*/
+
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -83,7 +85,7 @@ struct rte_table_hash {
uint32_t *stack;
/* Lookup table */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
static int
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2010-2017 Intel Corporation
*/
+
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -83,7 +85,7 @@ struct rte_table_hash {
uint32_t *stack;
/* Lookup table */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
static int
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2010-2017 Intel Corporation
*/
+
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -79,7 +81,7 @@ struct rte_table_hash {
uint32_t *stack;
/* Lookup table */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
static int
@@ -2,6 +2,7 @@
* Copyright(c) 2010-2017 Intel Corporation
*/
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -76,7 +77,7 @@ struct rte_table_hash {
uint32_t *key_stack;
/* Table memory */
- uint8_t memory[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t memory[0];
};
static int
@@ -2,6 +2,7 @@
* Copyright(c) 2010-2014 Intel Corporation
*/
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -47,7 +48,7 @@ struct rte_table_lpm {
/* Next Hop Table (NHT) */
uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
- uint8_t nht[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
};
static void *
@@ -2,6 +2,7 @@
* Copyright(c) 2010-2014 Intel Corporation
*/
+#include <stdalign.h>
#include <string.h>
#include <stdio.h>
@@ -44,7 +45,7 @@ struct rte_table_lpm_ipv6 {
/* Next Hop Table (NHT) */
uint32_t nht_users[RTE_TABLE_LPM_MAX_NEXT_HOPS];
- uint8_t nht[0] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint8_t nht[0];
};
static void *