From patchwork Mon Feb 26 18:25:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tyler Retzlaff X-Patchwork-Id: 137264 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E8CFE43BF3; Mon, 26 Feb 2024 19:29:09 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3BFBF42EFD; Mon, 26 Feb 2024 19:26:35 +0100 (CET) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 0849142E5B for ; Mon, 26 Feb 2024 19:25:51 +0100 (CET) Received: by linux.microsoft.com (Postfix, from userid 1086) id 6F99920B74D4; Mon, 26 Feb 2024 10:25:48 -0800 (PST) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 6F99920B74D4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1708971949; bh=jI1OS4SYHOo0UvJulwGLr3M5GqYCkvjDVdMxhZGlLa0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ID0x2czU/Oq5/N5xurygAlK6hWgR04yJjxc9Fg3nU2MddbgcK0pohHoQGk6BpQqcJ wswl94YRulqlO4Rqpm+z6I/O5X/bj6zB3yol4e7faBG0c/TkliUVU8Rq1eZQHPcMoI mDu1zxIKCh9tRSMGLt+40jHaLntidJEORj4CfA44= From: Tyler Retzlaff To: dev@dpdk.org Cc: Andrew Rybchenko , Bruce Richardson , Chengwen Feng , Cristian Dumitrescu , David Christensen , David Hunt , Ferruh Yigit , Honnappa Nagarahalli , Jasvinder Singh , Jerin Jacob , Kevin Laatz , Konstantin Ananyev , Min Zhou , Ruifeng Wang , Sameh Gobriel , Stanislaw Kardach , Thomas Monjalon , Vladimir Medvedkin , Yipeng Wang , Tyler Retzlaff Subject: [PATCH v6 20/39] rcu: use C11 alignas Date: Mon, 26 Feb 2024 10:25:27 -0800 Message-Id: <1708971946-18231-21-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1708971946-18231-1-git-send-email-roretzla@linux.microsoft.com> References: <1707873986-29352-1-git-send-email-roretzla@linux.microsoft.com> <1708971946-18231-1-git-send-email-roretzla@linux.microsoft.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The current location used for __rte_aligned(a) for alignment of types and variables is not compatible with MSVC. There is only a single location accepted by both toolchains. For variables standard C11 offers alignas(a) supported by conformant compilers i.e. both MSVC and GCC. For types the standard offers no alignment facility that compatibly interoperates with C and C++ but may be achieved by relocating the placement of __rte_aligned(a) to the aforementioned location accepted by all currently supported toolchains. To allow alignment for both compilers do the following: * Move __rte_aligned from the end of {struct,union} definitions to be between {struct,union} and tag. The placement between {struct,union} and the tag allows the desired alignment to be imparted on the type regardless of the toolchain being used for all of GCC, LLVM, MSVC compilers building both C and C++. * Replace use of __rte_aligned(a) on variables/fields with alignas(a). Signed-off-by: Tyler Retzlaff Acked-by: Morten Brørup --- lib/rcu/rte_rcu_qsbr.h | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/lib/rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h index e7ef788..d8ecf11 100644 --- a/lib/rcu/rte_rcu_qsbr.h +++ b/lib/rcu/rte_rcu_qsbr.h @@ -21,6 +21,8 @@ * entered quiescent state. */ +#include + #ifdef __cplusplus extern "C" { #endif @@ -69,7 +71,7 @@ #define RTE_QSBR_THRID_INVALID 0xffffffff /* Worker thread counter */ -struct rte_rcu_qsbr_cnt { +struct __rte_cache_aligned rte_rcu_qsbr_cnt { RTE_ATOMIC(uint64_t) cnt; /**< Quiescent state counter. Value 0 indicates the thread is offline * 64b counter is used to avoid adding more code to address @@ -78,7 +80,7 @@ struct rte_rcu_qsbr_cnt { */ RTE_ATOMIC(uint32_t) lock_cnt; /**< Lock counter. Used when RTE_LIBRTE_RCU_DEBUG is enabled */ -} __rte_cache_aligned; +}; #define __RTE_QSBR_CNT_THR_OFFLINE 0 #define __RTE_QSBR_CNT_INIT 1 @@ -91,28 +93,28 @@ struct rte_rcu_qsbr_cnt { * 1) Quiescent state counter array * 2) Register thread ID array */ -struct rte_rcu_qsbr { - RTE_ATOMIC(uint64_t) token __rte_cache_aligned; +struct __rte_cache_aligned rte_rcu_qsbr { + alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint64_t) token; /**< Counter to allow for multiple concurrent quiescent state queries */ RTE_ATOMIC(uint64_t) acked_token; /**< Least token acked by all the threads in the last call to * rte_rcu_qsbr_check API. */ - uint32_t num_elems __rte_cache_aligned; + alignas(RTE_CACHE_LINE_SIZE) uint32_t num_elems; /**< Number of elements in the thread ID array */ RTE_ATOMIC(uint32_t) num_threads; /**< Number of threads currently using this QS variable */ uint32_t max_threads; /**< Maximum number of threads using this QS variable */ - struct rte_rcu_qsbr_cnt qsbr_cnt[0] __rte_cache_aligned; + alignas(RTE_CACHE_LINE_SIZE) struct rte_rcu_qsbr_cnt qsbr_cnt[0]; /**< Quiescent state counter array of 'max_threads' elements */ /**< Registered thread IDs are stored in a bitmap array, * after the quiescent state counter array. */ -} __rte_cache_aligned; +}; /** * Call back function called to free the resources.