diff mbox series

[v6,14/23] net/mlx5: use mbuf descriptor accessors

Message ID 1709012499-12813-15-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series stop and remove RTE_MARKER typedefs |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tyler Retzlaff Feb. 27, 2024, 5:41 a.m. UTC 
  RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Use
new rte_mbuf_rearm_data and rte_mbuf_rx_descriptor_fields1 accessors
that provide a compatible type pointer without using the marker fields.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/mlx5/mlx5_rxq.c              |  2 +-
 drivers/net/mlx5/mlx5_rxtx_vec.h         | 19 -------------------
 drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 28 ++++++++++++++--------------
 drivers/net/mlx5/mlx5_rxtx_vec_neon.h    | 20 ++++++++++----------
 drivers/net/mlx5/mlx5_rxtx_vec_sse.h     | 28 ++++++++++++++--------------
 5 files changed, 39 insertions(+), 58 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index ca2eeed..b854418 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -200,7 +200,7 @@ 
 		 */
 		rte_compiler_barrier();
 		rxq->mbuf_initializer =
-			*(rte_xmm_t *)&mbuf_init->rearm_data;
+			*(rte_xmm_t *)rte_mbuf_rearm_data(mbuf_init);
 		/* Padding with a fake mbuf for vectorized Rx. */
 		for (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)
 			(*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.h b/drivers/net/mlx5/mlx5_rxtx_vec.h
index 77c3f4e..43518c4 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec.h
@@ -29,25 +29,6 @@ 
 #define S_ASSERT_MLX5_CQE(s) \
 	static_assert(s, "A field of struct mlx5_cqe is changed")
 
-/* rxq_cq_decompress_v() */
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, pkt_len) ==
-		  offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, data_len) ==
-		  offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, hash) ==
-		  offsetof(struct rte_mbuf, rx_descriptor_fields1) + 12);
-
-/* rxq_cq_to_ptype_oflags_v() */
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, ol_flags) ==
-		  offsetof(struct rte_mbuf, rearm_data) + 8);
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, rearm_data) ==
-		  RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16));
-
-/* rxq_burst_v() */
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, pkt_len) ==
-		  offsetof(struct rte_mbuf, rx_descriptor_fields1) + 4);
-S_ASSERT_RTE_MBUF(offsetof(struct rte_mbuf, data_len) ==
-		  offsetof(struct rte_mbuf, rx_descriptor_fields1) + 8);
 #if (RTE_CACHE_LINE_SIZE == 128)
 S_ASSERT_MLX5_CQE(offsetof(struct mlx5_cqe, pkt_info) == 64);
 #else
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
index cccfa7f..9349c21 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h
@@ -101,10 +101,10 @@ 
 	uint16_t pkts_n = mcqe_n;
 	const __vector unsigned char rearm =
 		(__vector unsigned char)vec_vsx_ld(0,
-		(signed int const *)&t_pkt->rearm_data);
+		(signed int const *)rte_mbuf_rearm_data(t_pkt));
 	const __vector unsigned char rxdf =
 		(__vector unsigned char)vec_vsx_ld(0,
-		(signed int const *)&t_pkt->rx_descriptor_fields1);
+		(signed int const *)rte_mbuf_rx_descriptor_fields1(t_pkt));
 	const __vector unsigned char crc_adj =
 		(__vector unsigned char)(__vector unsigned short){
 			0, 0, rxq->crc_present * RTE_ETHER_CRC_LEN, 0,
@@ -173,9 +173,9 @@ 
 
 		/* B.1 store rearm data to mbuf. */
 		*(__vector unsigned char *)
-			&elts[pos]->rearm_data = rearm;
+			rte_mbuf_rearm_data(elts[pos]) = rearm;
 		*(__vector unsigned char *)
-			&elts[pos + 1]->rearm_data = rearm;
+			rte_mbuf_rearm_data(elts[pos + 1]) = rearm;
 
 		/* C.1 combine data from mCQEs with rx_descriptor_fields1. */
 		rxdf1 = vec_perm(mcqe1, zero, shuf_mask1);
@@ -195,15 +195,15 @@ 
 
 		/* D.1 store rx_descriptor_fields1. */
 		*(__vector unsigned char *)
-			&elts[pos]->rx_descriptor_fields1 = rxdf1;
+			rte_mbuf_rx_descriptor_fields1(elts[pos]) = rxdf1;
 		*(__vector unsigned char *)
-			&elts[pos + 1]->rx_descriptor_fields1 = rxdf2;
+			rte_mbuf_rx_descriptor_fields1(elts[pos + 1]) = rxdf2;
 
 		/* B.1 store rearm data to mbuf. */
 		*(__vector unsigned char *)
-			&elts[pos + 2]->rearm_data = rearm;
+			rte_mbuf_rearm_data(elts[pos + 2]) = rearm;
 		*(__vector unsigned char *)
-			&elts[pos + 3]->rearm_data = rearm;
+			rte_mbuf_rearm_data(elts[pos + 3]) = rearm;
 
 		/* C.1 combine data from mCQEs with rx_descriptor_fields1. */
 		rxdf1 = vec_perm(mcqe2, zero, shuf_mask1);
@@ -223,9 +223,9 @@ 
 
 		/* D.1 store rx_descriptor_fields1. */
 		*(__vector unsigned char *)
-			&elts[pos + 2]->rx_descriptor_fields1 = rxdf1;
+			rte_mbuf_rx_descriptor_fields1(elts[pos + 2]) = rxdf1;
 		*(__vector unsigned char *)
-			&elts[pos + 3]->rx_descriptor_fields1 = rxdf2;
+			rte_mbuf_rx_descriptor_fields1(elts[pos + 3]) = rxdf2;
 
 #ifdef MLX5_PMD_SOFT_COUNTERS
 		invalid_mask = (__vector unsigned char)(__vector unsigned long){
@@ -769,13 +769,13 @@ 
 
 	/* Write 8B rearm_data and 8B ol_flags. */
 	vec_vsx_st(rearm0, 0,
-		(__vector unsigned char *)&pkts[0]->rearm_data);
+		(__vector unsigned char *)rte_mbuf_rearm_data(pkts[0]));
 	vec_vsx_st(rearm1, 0,
-		(__vector unsigned char *)&pkts[1]->rearm_data);
+		(__vector unsigned char *)rte_mbuf_rearm_data(pkts[1]));
 	vec_vsx_st(rearm2, 0,
-		(__vector unsigned char *)&pkts[2]->rearm_data);
+		(__vector unsigned char *)rte_mbuf_rearm_data(pkts[2]));
 	vec_vsx_st(rearm3, 0,
-		(__vector unsigned char *)&pkts[3]->rearm_data);
+		(__vector unsigned char *)rte_mbuf_rearm_data(pkts[3]));
 }
 
 /**
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
index 3ed6881..97ea620 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
@@ -99,7 +99,7 @@ 
 		t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN);
 	uint16_t pkts_n = mcqe_n;
 	const uint64x2_t rearm =
-		vld1q_u64((void *)&t_pkt->rearm_data);
+		vld1q_u64((void *)rte_mbuf_rearm_data(t_pkt));
 	const uint32x4_t rxdf_mask = {
 		0xffffffff, /* packet_type */
 		0,          /* skip pkt_len */
@@ -107,7 +107,7 @@ 
 		0,          /* skip hash.rss */
 	};
 	const uint8x16_t rxdf =
-		vandq_u8(vld1q_u8((void *)&t_pkt->rx_descriptor_fields1),
+		vandq_u8(vld1q_u8(rte_mbuf_rx_descriptor_fields1(t_pkt)),
 			 vreinterpretq_u8_u32(rxdf_mask));
 	const uint16x8_t crc_adj = {
 		0, 0,
@@ -140,10 +140,10 @@ 
 		rte_prefetch0((void *)(cq + mcqe_n));
 	for (pos = 0; pos < mcqe_n; ) {
 		uint8_t *p = (void *)&mcq[pos % 8];
-		uint8_t *e0 = (void *)&elts[pos]->rearm_data;
-		uint8_t *e1 = (void *)&elts[pos + 1]->rearm_data;
-		uint8_t *e2 = (void *)&elts[pos + 2]->rearm_data;
-		uint8_t *e3 = (void *)&elts[pos + 3]->rearm_data;
+		uint8_t *e0 = (void *)rte_mbuf_rearm_data(elts[pos]);
+		uint8_t *e1 = (void *)rte_mbuf_rearm_data(elts[pos + 1]);
+		uint8_t *e2 = (void *)rte_mbuf_rearm_data(elts[pos + 2]);
+		uint8_t *e3 = (void *)rte_mbuf_rearm_data(elts[pos + 3]);
 		uint16x4_t byte_cnt;
 #ifdef MLX5_PMD_SOFT_COUNTERS
 		uint16x4_t invalid_mask =
@@ -513,10 +513,10 @@ 
 					(vgetq_lane_u32(ol_flags, 0),
 					 vreinterpretq_u32_u64(mbuf_init), 2));
 
-	vst1q_u64((void *)&pkts[0]->rearm_data, rearm0);
-	vst1q_u64((void *)&pkts[1]->rearm_data, rearm1);
-	vst1q_u64((void *)&pkts[2]->rearm_data, rearm2);
-	vst1q_u64((void *)&pkts[3]->rearm_data, rearm3);
+	vst1q_u64((void *)rte_mbuf_rearm_data(pkts[0]), rearm0);
+	vst1q_u64((void *)rte_mbuf_rearm_data(pkts[1]), rearm1);
+	vst1q_u64((void *)rte_mbuf_rearm_data(pkts[2]), rearm2);
+	vst1q_u64((void *)rte_mbuf_rearm_data(pkts[3]), rearm3);
 }
 
 /**
diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
index 2bdd1f6..088ce37 100644
--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h
@@ -98,9 +98,9 @@ 
 		t_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN);
 	uint16_t pkts_n = mcqe_n;
 	const __m128i rearm =
-		_mm_loadu_si128((__m128i *)&t_pkt->rearm_data);
+		_mm_loadu_si128((__m128i *)rte_mbuf_rearm_data(t_pkt));
 	const __m128i rxdf =
-		_mm_loadu_si128((__m128i *)&t_pkt->rx_descriptor_fields1);
+		_mm_loadu_si128((__m128i *)rte_mbuf_rx_descriptor_fields1(t_pkt));
 	const __m128i crc_adj =
 		_mm_set_epi16(0, 0, 0,
 			      rxq->crc_present * RTE_ETHER_CRC_LEN,
@@ -145,8 +145,8 @@ 
 		mcqe1 = _mm_loadu_si128((__m128i *)&mcq[pos % 8]);
 		mcqe2 = _mm_loadu_si128((__m128i *)&mcq[pos % 8 + 2]);
 		/* B.1 store rearm data to mbuf. */
-		_mm_storeu_si128((__m128i *)&elts[pos]->rearm_data, rearm);
-		_mm_storeu_si128((__m128i *)&elts[pos + 1]->rearm_data, rearm);
+		_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos]), rearm);
+		_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos + 1]), rearm);
 		/* C.1 combine data from mCQEs with rx_descriptor_fields1. */
 		rxdf1 = _mm_shuffle_epi8(mcqe1, shuf_mask1);
 		rxdf2 = _mm_shuffle_epi8(mcqe1, shuf_mask2);
@@ -156,14 +156,14 @@ 
 		rxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);
 		/* D.1 store rx_descriptor_fields1. */
 		_mm_storeu_si128((__m128i *)
-				  &elts[pos]->rx_descriptor_fields1,
+				  rte_mbuf_rx_descriptor_fields1(elts[pos]),
 				 rxdf1);
 		_mm_storeu_si128((__m128i *)
-				  &elts[pos + 1]->rx_descriptor_fields1,
+				  rte_mbuf_rx_descriptor_fields1(elts[pos + 1]),
 				 rxdf2);
 		/* B.1 store rearm data to mbuf. */
-		_mm_storeu_si128((__m128i *)&elts[pos + 2]->rearm_data, rearm);
-		_mm_storeu_si128((__m128i *)&elts[pos + 3]->rearm_data, rearm);
+		_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos + 2]), rearm);
+		_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos + 3]), rearm);
 		/* C.1 combine data from mCQEs with rx_descriptor_fields1. */
 		rxdf1 = _mm_shuffle_epi8(mcqe2, shuf_mask1);
 		rxdf2 = _mm_shuffle_epi8(mcqe2, shuf_mask2);
@@ -173,10 +173,10 @@ 
 		rxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);
 		/* D.1 store rx_descriptor_fields1. */
 		_mm_storeu_si128((__m128i *)
-				  &elts[pos + 2]->rx_descriptor_fields1,
+				  rte_mbuf_rx_descriptor_fields1(elts[pos + 2]),
 				 rxdf1);
 		_mm_storeu_si128((__m128i *)
-				  &elts[pos + 3]->rx_descriptor_fields1,
+				  rte_mbuf_rx_descriptor_fields1(elts[pos + 3]),
 				 rxdf2);
 #ifdef MLX5_PMD_SOFT_COUNTERS
 		invalid_mask = _mm_set_epi64x(0,
@@ -511,10 +511,10 @@ 
 	rearm2 = _mm_blend_epi16(mbuf_init, ol_flags, 0x30);
 	rearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(ol_flags, 4), 0x30);
 	/* Write 8B rearm_data and 8B ol_flags. */
-	_mm_store_si128((__m128i *)&pkts[0]->rearm_data, rearm0);
-	_mm_store_si128((__m128i *)&pkts[1]->rearm_data, rearm1);
-	_mm_store_si128((__m128i *)&pkts[2]->rearm_data, rearm2);
-	_mm_store_si128((__m128i *)&pkts[3]->rearm_data, rearm3);
+	_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[0]), rearm0);
+	_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[1]), rearm1);
+	_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[2]), rearm2);
+	_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[3]), rearm3);
 }
 
 /**