Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.
Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
drivers/net/hns3/hns3_ethdev.h | 4 ++--
drivers/net/hns3/hns3_fdir.c | 4 ++--
drivers/net/hns3/hns3_rxtx.h | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
@@ -767,7 +767,7 @@ struct hns3_ptype_table {
* descriptor, it functions only when firmware report the capability of
* HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it.
*/
- uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype[HNS3_PTYPE_NUM];
};
#define HNS3_FIXED_MAX_TQP_NUM_MODE 0
@@ -872,7 +872,7 @@ struct hns3_adapter {
uint64_t dev_caps_mask;
uint16_t mbx_time_limit_ms; /* wait time for mbx message */
- struct hns3_ptype_table ptype_tbl __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) struct hns3_ptype_table ptype_tbl;
};
enum hns3_dev_cap {
@@ -724,8 +724,8 @@ static int hns3_config_key(struct hns3_adapter *hns,
struct hns3_fd_key_cfg *key_cfg;
uint8_t *cur_key_x;
uint8_t *cur_key_y;
- uint8_t key_x[MAX_KEY_BYTES] __rte_aligned(4);
- uint8_t key_y[MAX_KEY_BYTES] __rte_aligned(4);
+ alignas(4) uint8_t key_x[MAX_KEY_BYTES];
+ alignas(4) uint8_t key_y[MAX_KEY_BYTES];
uint8_t vf_id = rule->vf_id;
uint8_t meta_data_region;
uint8_t tuple_size;
@@ -366,7 +366,7 @@ struct hns3_rx_queue {
* The following fields are not accessed in the I/O path, so they are
* placed at the end.
*/
- void *io_base __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) void *io_base;
struct hns3_adapter *hns;
uint64_t rx_ring_phys_addr; /* RX ring DMA address */
const struct rte_memzone *mz;
@@ -540,7 +540,7 @@ struct hns3_tx_queue {
* The following fields are not accessed in the I/O path, so they are
* placed at the end.
*/
- void *io_base __rte_cache_aligned;
+ alignas(RTE_CACHE_LINE_SIZE) void *io_base;
struct hns3_adapter *hns;
uint64_t tx_ring_phys_addr; /* TX ring DMA address */
const struct rte_memzone *mz;