diff mbox series

hash: provide crc32 functions based on intrinsics

Message ID 1710970127-25938-2-git-send-email-roretzla@linux.microsoft.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series hash: provide crc32 functions based on intrinsics |

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Commit Message

Tyler Retzlaff March 20, 2024, 9:28 p.m. UTC 
Provide crc32 inline functions implemented using intrinsics for MSVC.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 lib/hash/rte_crc_x86.h | 46 ++++++++++++++++++++++++++++++++++++----------
 1 file changed, 36 insertions(+), 10 deletions(-)

Comments

Thomas Monjalon May 16, 2024, 5:04 p.m. UTC | #1 
20/03/2024 22:28, Tyler Retzlaff:
> Provide crc32 inline functions implemented using intrinsics for MSVC.

This is replacing asm.
Could we completely replace asm, avoiding the #ifdef?
Tyler Retzlaff May 22, 2024, 12:02 a.m. UTC | #2 
MSVC does not support inline asm so replace crc32 inline function
implementations with intrinsics compatible with all toolchains.

v2:
    * just provide inline functions based on intrinsics and remove
      inline asm versions.

Tyler Retzlaff (1):
  hash: provide crc32 functions based on intrinsics

 lib/hash/rte_crc_x86.h | 38 +++++++++++++-------------------------
 1 file changed, 13 insertions(+), 25 deletions(-)
diff mbox series

Patch

diff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h
index 3b865e2..b2ac07f 100644
--- a/lib/hash/rte_crc_x86.h
+++ b/lib/hash/rte_crc_x86.h
@@ -5,6 +5,31 @@ 
 #ifndef _RTE_CRC_X86_H_
 #define _RTE_CRC_X86_H_
 
+#ifdef RTE_TOOLCHAIN_MSVC
+static inline uint32_t
+crc32c_sse42_u8(uint8_t data, uint32_t init_val)
+{
+	return _mm_crc32_u8(init_val, data);
+}
+
+static inline uint32_t
+crc32c_sse42_u16(uint16_t data, uint32_t init_val)
+{
+	return _mm_crc32_u16(init_val, data);
+}
+
+static inline uint32_t
+crc32c_sse42_u32(uint32_t data, uint32_t init_val)
+{
+	return _mm_crc32_u32(init_val, data);
+}
+
+static inline uint32_t
+crc32c_sse42_u64(uint64_t data, uint64_t init_val)
+{
+	return _mm_crc32_u64(init_val, data);
+}
+#else
 static inline uint32_t
 crc32c_sse42_u8(uint8_t data, uint32_t init_val)
 {
@@ -36,6 +61,17 @@ 
 }
 
 static inline uint32_t
+crc32c_sse42_u64(uint64_t data, uint64_t init_val)
+{
+	__asm__ volatile(
+			"crc32q %[data], %[init_val];"
+			: [init_val] "+r" (init_val)
+			: [data] "rm" (data));
+	return (uint32_t)init_val;
+}
+#endif
+
+static inline uint32_t
 crc32c_sse42_u64_mimic(uint64_t data, uint64_t init_val)
 {
 	union {
@@ -49,16 +85,6 @@ 
 	return (uint32_t)init_val;
 }
 
-static inline uint32_t
-crc32c_sse42_u64(uint64_t data, uint64_t init_val)
-{
-	__asm__ volatile(
-			"crc32q %[data], %[init_val];"
-			: [init_val] "+r" (init_val)
-			: [data] "rm" (data));
-	return (uint32_t)init_val;
-}
-
 /*
  * Use single crc32 instruction to perform a hash on a byte value.
  * Fall back to software crc32 implementation in case SSE4.2 is