@@ -136,7 +136,7 @@ struct priv_op_data {
uint32_t imix_idx = 0;
int ret = 0;
- static uint16_t display_once;
+ static RTE_ATOMIC(uint16_t) display_once;
if (ctx == NULL)
return 0;
@@ -341,8 +341,8 @@ struct priv_op_data {
uint16_t exp = 0;
if (ctx->options->csv) {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, "
"cycles, time (us)");
@@ -396,7 +396,7 @@ struct pmd_cyclecount_state {
state.lcore = rte_lcore_id();
state.linearize = 0;
- static uint16_t display_once;
+ static RTE_ATOMIC(uint16_t) display_once;
static bool warmup = true;
/*
@@ -443,8 +443,8 @@ struct pmd_cyclecount_state {
uint16_t exp = 0;
if (!opts->csv) {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf(PRETTY_HDR_FMT, "lcore id", "Buf Size",
"Burst Size", "Enqueued",
"Dequeued", "Enq Retries",
@@ -460,8 +460,8 @@ struct pmd_cyclecount_state {
state.cycles_per_enq,
state.cycles_per_deq);
} else {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
"Burst Size", "Enqueued",
"Dequeued", "Enq Retries",
@@ -107,7 +107,7 @@ struct cperf_throughput_ctx {
uint8_t burst_size_idx = 0;
uint32_t imix_idx = 0;
- static uint16_t display_once;
+ static RTE_ATOMIC(uint16_t) display_once;
struct rte_crypto_op *ops[ctx->options->max_burst_size];
struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
@@ -277,8 +277,8 @@ struct cperf_throughput_ctx {
uint16_t exp = 0;
if (!ctx->options->csv) {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
"lcore id", "Buf Size", "Burst Size",
"Enqueued", "Dequeued", "Failed Enq",
@@ -298,8 +298,8 @@ struct cperf_throughput_ctx {
throughput_gbps,
cycles_per_packet);
} else {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf("#lcore id,Buffer Size(B),"
"Burst Size,Enqueued,Dequeued,Failed Enq,"
"Failed Deq,Ops(Millions),Throughput(Gbps),"
@@ -216,7 +216,7 @@ struct cperf_op_result {
uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;
uint64_t ops_failed = 0;
- static uint16_t display_once;
+ static RTE_ATOMIC(uint16_t) display_once;
uint64_t i;
uint16_t ops_unused = 0;
@@ -370,8 +370,8 @@ struct cperf_op_result {
uint16_t exp = 0;
if (!ctx->options->csv) {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf("%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
"lcore id", "Buf Size", "Burst size",
"Enqueued", "Dequeued", "Failed Enq",
@@ -388,8 +388,8 @@ struct cperf_op_result {
ops_deqd_failed,
ops_failed);
} else {
- if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0,
- __ATOMIC_RELAXED, __ATOMIC_RELAXED))
+ if (rte_atomic_compare_exchange_strong_explicit(&display_once, &exp, 1,
+ rte_memory_order_relaxed, rte_memory_order_relaxed))
printf("\n# lcore id, Buffer Size(B), "
"Burst Size,Enqueued,Dequeued,Failed Enq,"
"Failed Deq,Failed Ops\n");