From patchwork Wed May 17 18:19:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 24348 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id DFB4D2C6D; Wed, 17 May 2017 20:20:05 +0200 (CEST) Received: from NAM03-DM3-obe.outbound.protection.outlook.com (mail-dm3nam03on0089.outbound.protection.outlook.com [104.47.41.89]) by dpdk.org (Postfix) with ESMTP id 621BF2C5 for ; Wed, 17 May 2017 20:20:03 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=kl6+L2cL3ZFFKKAo3lM4wjz2jtWv/7TUUrmJTXm5YrA=; b=DEdzbApGz3MpJcFhdcib79sJwwM/amDPqbVNLEQkztmyACEYMiY77stHeMTNq8/tTXAWomOE25XxZbFtMK+GbuiUbCvKhzcGEyKL88pQLXIeLWWjHRP3J3UJ6fr7FLGTuAmu7HgcB0YVPK+2UB00Cq+o4ye/fypvQ8P9NQpsioI= Authentication-Results: caviumnetworks.com; dkim=none (message not signed) header.d=none;caviumnetworks.com; dmarc=none action=none header.from=caviumnetworks.com; Received: from 1scrb-1.caveonetworks.com (50.233.148.156) by BL2PR07MB2418.namprd07.prod.outlook.com (10.167.101.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1084.16; Wed, 17 May 2017 18:19:58 +0000 From: Ashwin Sekhar T K To: jerin.jacob@caviumnetworks.com, john.mcnamara@intel.com, jianbo.liu@linaro.org Cc: dev@dpdk.org, Ashwin Sekhar T K Date: Wed, 17 May 2017 11:19:49 -0700 Message-Id: <20170517181949.12002-1-ashwin.sekhar@caviumnetworks.com> X-Mailer: git-send-email 2.12.2 MIME-Version: 1.0 X-Originating-IP: [50.233.148.156] X-ClientProxiedBy: MWHPR13CA0004.namprd13.prod.outlook.com (10.169.208.14) To BL2PR07MB2418.namprd07.prod.outlook.com (10.167.101.142) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 69bd1a22-b4d4-48fb-ecc8-08d49d515433 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(201703131423075)(201703031133081); SRVR:BL2PR07MB2418; X-Microsoft-Exchange-Diagnostics: 1; BL2PR07MB2418; 3:cNkoriq+HjRIY0bJi2+2iTpol8YcwB440JSnB8bOfs2qs7fQk8HPv0yHPyUe5I8MBaEITvtLwf6Zo3gc9AM8GtUL4PgY6N1/CFGSS9+DrIxB9kh7r3Z9LonkGtSSXxUA8ChOeb3TvI1i9OGiuxMuLeYayBQ2JgTo7eSCL2O0Ry2Y/05LvOqDEuc2DfzgohWlODcwnlq3rOVnJfUSSmUmh/ot6G2ilaOia/7cTJ2FT7358Kp9oMkm02TIMWNkHdp3hVZbh43x+gKbLS3k++kZbkH5ip+jghLZ1hR7rksfZfKgx6YiEFzLuNJqsCfb5ultiucbKqTmMxrMjXbLF/y2lQ==; 25:uc/wdjAv5hkkixga6VmYsS8WXJFV8JfD9v5CI98bw1MOCtHzBqV0YEH40RolPmcgpG2FkAU7SlNLrOGJ5X6yzrHPxxbGuoMkucIjcr8tx26ii5B8ndxl1SPVd/93oAwIY4Vrl3uPRag5TKHzleSOYy3MZcFKaVmZgDzTdJTQ0TKNj7fPEp1b+Ozrk1i58NF4FOZxTtzoYUh4tfeMNLEECyHNkf4SHtBSwj7FtauQnngNVa/aubvSwET7VSXzVhNTBgknMcIpk1ermgzsDSNQ5TJRXwxOFCaMg/uWZ2UuP+BCMCbHRH+d316QWzQGax05linlNhcbc+ysFQtw2Na5KAiYFnjeTFPaTjs/WQrjYNWKyvLwlqSiXqkjyCsWxiSsrG0kRQYDPBNFiA5Eahyeb0ByLSQnpfhzrQKmmUuxQui5WC5Hff6Y12i41Kn6jBGxS66zNQbcIA4QNzWTB6jLokf6HDG2r436u+puZaUXLAs= X-Microsoft-Exchange-Diagnostics: 1; BL2PR07MB2418; 31:RJ1MV+k5cf9AQf96KfAWl76RrequRRjunCuegmKWLxE5zYiHM0wyablZIm8nu2Qn1iqOLXFo+7UFmXqCz91Pv3TRGuJVcqNqq49ABhz08vFpfJEYOSYOpMh0eCCcF3KIHFGhgtbuno2FPvpt9vDaGGnaJrl0fhwFYJNykj07F5HQO0yWRDSLTuBtRDXqPztpW7ZmcB1YwXvMw74yBGq+ibBd/+Lxsl8wWjpHMnFjL2c=; 20:CoxM3UHZtZurgBo+ZI+IxKh0KULmIwlj/TEhQN26GS5YBJ4VfxcgHwdP0M9R9NtFmjJ8s8f0wlSr6EtkTT4Idthr7kJgGV/9F2CHWOFozUpIaAYyO3p8s2xlGES6Ijnd+1DZeDi/1Zh3gx8HZffsYdtEAZIkH6kgKl3hTMBb663mHyREF6GCPtqaJKdabZqg+QHPz8hYhxWzRNMPilsvdhFnh7LAD4m/8kYLRspYfxRiauONjK1LhBEcy15Q0oyU38moZnkjR5+rI/Ty09QB73Sg1VKP6jTfiFrMmkOTtnHErnOmA0W2rwiSHjXaYeIXrS+3FIwFCG8hGt+gVFyO10T+UzJwM5slf9J1UOqeSwJdq39TcBXN5k2jVjarJ1t5I55U4PUGaYyM5oN/xJOO48RVd0Rc6nh13qVB/VucYAHtHSJl8CgM6Gb5v1Pp/he/mnypZCdV/p5JfJPd6lHX/fy/m7xarRai7VK+fHAdF5LZc+5ImikgbTMcwUMCv6YcbxAP6jML3Cpr84960T35p4Pm+70RAEWADpnKUX95JLHUGkk7KQu6q4f9XAU0UJu1CAHMKg3XwM7xM3sreBN7qhrlX3odoagXCwOKdbt/9YY= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(166708455590820)(788757137089); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(6040450)(601004)(2401047)(5005006)(8121501046)(10201501046)(93006095)(3002001)(6041248)(20161123560025)(20161123558100)(20161123562025)(20161123564025)(20161123555025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(6072148); SRVR:BL2PR07MB2418; BCL:0; PCL:0; RULEID:; SRVR:BL2PR07MB2418; X-Microsoft-Exchange-Diagnostics: 1; BL2PR07MB2418; 4:zDO5YatcOmFktxsq+ZWKmRnO0qa+8DOxvNndVPP0TWztd+ZyWgvsiy0S3JSnU+us7K/A0UjeSMVKOdoXALLz5ztTRmpuFG5wNwGVtw8bbxZbgOKuuEzDCwjxhCUMD1mP2Ylp2DhNmFMuJeqq+6SXSwyxri5I6Oahpak1Q4ToGYOnUH2wHFBpBIRw+G9URzo3nlRCxCUQ+kIEBzL/ULc3TvA4Ov73RzTOrKa10knrh/Tj3BeGb2br37tQNRMB262OVwtzZspYT3Fwom1ePZs0hN7hrsnVnMy+/jNuBam7ftJJsiwcEPKjO1xmFhNyHG7Sdax2Sm1sy35TZsN076luQzM9bYeDs7V9ERQWDTa9dHi2YELcr/AuzEkH2dptZJFvQhM934p6WNg66UGPi4ZCrCcVEzFTephI/O6/vIc8glO8Bpr+T+rGSJctGgUK0Qk3z9ZykDVN1yAYHxPOyMDf3DEaKGTM/+viFvz9jY8Fdll3up6w3wu2g/eaJ79eZX1hnau+PUtkOFmVfbRnIrDlGtnCThX7jQ1EMnmJY9/Wq92n1dUkLSGz1g9f3bHiMjq7/VAaQvj3Cyv/cQhdRQWK3iPdnBG2YWDuuLNOwn2mqASbiiOpPCZfx+YOLtWUW5Q0fuQGEORTmA3itZXaggziZfzvlkquK8ELg7c2C9mNcL5LxfczYq45kDGYMeQbCKxZCSjRrYCtRZVyCtYQVgbwCE0Kr8YDDWZZSRMCGVZJHjkw17QPWTKB0GUhz4VpasQK8qMZszu40QX07LwQ5AtE2bdCqqWTU4aJPhlMLL45zqjS9BChsYepi997EH9l1KRsV9A+H7r3dTZ/OlI1RNq+BA== X-Forefront-PRVS: 0310C78181 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6009001)(39450400003)(39850400002)(39840400002)(39400400002)(39410400002)(36756003)(53936002)(25786009)(33646002)(47776003)(50986999)(6486002)(6116002)(53416004)(3846002)(6506006)(66066001)(6512007)(6306002)(1076002)(5660300001)(50466002)(478600001)(42186005)(2906002)(50226002)(48376002)(189998001)(42882006)(305945005)(966005)(110136004)(72206003)(8676002)(81166006)(107886003)(38730400002)(6666003)(7736002)(5003940100001)(4326008); DIR:OUT; SFP:1101; SCL:1; SRVR:BL2PR07MB2418; H:1scrb-1.caveonetworks.com; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; BL2PR07MB2418; 23:J1QEjmkH5ezvCsRGnumVHUeZLOTrdyecK4Ly7EFZS?= xDaS0ScYOU5jqfE64edacv+itfwYyVL1EqrbAZ0KVUFYtY2LI3JsFDqdSk0ophi4aui08UDOyqQcA//Pe6OCRxj3XxSDZU1ylUdDmvxzsdRcrMoAXRfpIW13Dkk9Fc9HHumq3NQXogfDQ0rg700ZtpiwgwfU96DHhK7l4FzyccARAXvm02k3rg4ii/UiEYzeI9qr2uf84eBNZhV1p3quKGIz1j1D1N1QdVnVI2SvHhNPteW1kmhuPCAo0vBS5Hw3GKKEt8wPmGH+pN3+TfEXy6UeNA/12x4lHGQ2/QlNcTAeEfMW0nGdVqc9HKfsmLy1BTb6Wo9kMSrNZVuoqXxF6Wo/77FagCDWxpMEdsy79INR+t/AqcW7WXJYBy7MmZUJXsTM1odNZKdiJ+hUch/ShGXzqu9Voboibw98i6o1T6fpyTDmMw3tx7n3EwnYoD6A445F0GSMf0OcsNonMKoBaBmeZHdhYl0Xi3o7ptpzTDkz37av2/cleVaxxxJ4Sv5FczumZ6/o631vR/SGmxL7RYulC5+nGj2JYtShoBMSLx51+oKDTozb9MJQ/WwTQxAy36vEa1MT2/ASKqjuWgiJvIAg8tuDrpV4usx2gFY7dJAK/9CeeA+QYKQvQdHJpGDwKgBnCH6k0zQhgpX5zH1bubKesmH+L0AVfwfg0OUDgSWv81t+DvdSV2m+IMl6sQuRCBivEw3YcDfIznLFy7EnIEtp29ph8ud1mZN1mU+cJRsygzx2ostpQH9ixtzZUJojNORZdAEoIjuviuEpMXfrYhVxkSQ6R2eQiN5lJL0+7rF6PvGwqF1d6kl8OoNOSUb1BccEU6bRco5d7ZLrRJF9gB70bNcRXZ9C5GsfiJnLwfIda8suLN+hn8a1VGawQMYaSLHnQPu/ek/7q7ob9DDxslxdvppxjKc940GnFa1GFmOQ8usVTYDTAnMDUlycf474ist3CbIb3QTGpuPDSo20/QD49gcz+1CQz7peMSAloZuZl7599/G0RpBluR98CAE4A9eJdUSrWyMKmBfPnmXg0Ux X-Microsoft-Exchange-Diagnostics: 1; BL2PR07MB2418; 6:1bn1kbm6/AXS4uij62aa6HQ/3MmJ8MBz+xelsQsAy2JFMNb4ACQKvRu+Hh6MvhdY2y4g43yFL1SN9duiHr9OeQmYYUxWt8ykDwuZn6VkEzcDOn54phCnbM7moYu8+QPhhFevfW4pUkMvFIeq7EolhhlapYfXoZDGkmnylpS7BJ7Mo2CYFm/wNxuQrUVdGIZiluXZE5TT8yBs/50Brqh931swZh70MfUhpRCwCrAMt92uTkGAYPHzxyGioIUTjH5oPaoNxOUY/Iju+ICmzx9Ym7uJ2QYBVbQ7oEx1eer+4bRpHCtlLo+lb7PEd/5PxEy0L3cATm/3vReuG6OTG6j3YWcur3RBTGHxx8VlAH1V2XALMAhEAGi8sxcLWhaDij8qzRFGKszYVDDfF1EkUptJLYYZIP2GvVUfVESRqsaCtHdy2hU52So7MZpTRseX5YIgB+MRl244VEEAaliZ/wgrhnLQRw1gNQ6edOSQJzRAtmYmFu92U7d7AWkOPeT7WSQgmIXtT98tUJ+H5TRb379LrQ==; 5:fecQfxQDGdxM5cnzhr4UpxLCj6srs0JZWiZAEY54nSEARlzgYX50KkfHBAeFn76VJa4OL/o+m4OFK+CNKdW4+Q/hsSCfCxXugC8O0L3j7uiIlLne/z1ObJj+Udc+islrRQA1BoViDMpkTAB+4rvClQ==; 24:2s0T2Th2ypnxE+f9QCP0sIQSlUe2eULs52C9qM6r4zbB3dtOCVT/wSy+IEumzwKwT0G9Zxqiy2b3iReRXIWsSGjlt6OlWNlctcV/yOkO4PA= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; BL2PR07MB2418; 7:1dNC9IO98bo3j+gnPvXb5kZFgbxHyuF9nt3QO98Kbq77ajIk9ZM5PBZDcKltsbP2LHHbj7x3ZBPlGWfi5tLe+NzatS3mJTSEyXTOZM1IFpPbugAeyrjhS61XHoUPfZFSPfj90ZH/R5EybQhVxCM2AJBl0RDUQpE3gqeJUX4+p0v4DZ9MwOkPjMS2/4t+aduT/rBaEnOMBjGKduTSCSG3N+Paljw1G34BxZDjldEzoDUnoC7XnmgmBvcrdLnqOsZuR5ZP2+rFVUfCABvL0qADXPrwjScIls7/tA6UV4Q6M4nzkiICJimftdMNxCcX2PizuvFwuCrcpYy7ieuPWyjcjQ== X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 May 2017 18:19:58.9964 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2PR07MB2418 Subject: [dpdk-dev] [PATCH] examples/performance-thread: add arm64 support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Updated Makefile to allow compilation for arm64 architecture. Moved the code for setting the initial stack to architecture specific directory. Added implementation of context-switch for arm64 architecture. Fixed minor compilation errors for arm64 compilation. Signed-off-by: Ashwin Sekhar T K --- examples/performance-thread/Makefile | 4 +- .../performance-thread/common/arch/arm64/ctx.c | 99 ++++++++++++++++++ .../performance-thread/common/arch/arm64/ctx.h | 95 ++++++++++++++++++ .../performance-thread/common/arch/arm64/stack.h | 111 +++++++++++++++++++++ .../performance-thread/common/arch/x86/stack.h | 65 ++++++++++++ examples/performance-thread/common/common.mk | 10 +- examples/performance-thread/common/lthread.c | 11 +- examples/performance-thread/l3fwd-thread/main.c | 2 +- 8 files changed, 383 insertions(+), 14 deletions(-) create mode 100644 examples/performance-thread/common/arch/arm64/ctx.c create mode 100644 examples/performance-thread/common/arch/arm64/ctx.h create mode 100644 examples/performance-thread/common/arch/arm64/stack.h create mode 100644 examples/performance-thread/common/arch/x86/stack.h diff --git a/examples/performance-thread/Makefile b/examples/performance-thread/Makefile index d19f8489e..0c5edfdb9 100644 --- a/examples/performance-thread/Makefile +++ b/examples/performance-thread/Makefile @@ -38,8 +38,8 @@ RTE_TARGET ?= x86_64-native-linuxapp-gcc include $(RTE_SDK)/mk/rte.vars.mk -ifneq ($(CONFIG_RTE_ARCH),"x86_64") -$(error This application is only supported for x86_64 targets) +ifeq ($(filter y,$(CONFIG_RTE_ARCH_X86_64) $(CONFIG_RTE_ARCH_ARM64)),) +$(error This application is only supported for x86_64 and arm64 targets) endif DIRS-y += l3fwd-thread diff --git a/examples/performance-thread/common/arch/arm64/ctx.c b/examples/performance-thread/common/arch/arm64/ctx.c new file mode 100644 index 000000000..7073cfd75 --- /dev/null +++ b/examples/performance-thread/common/arch/arm64/ctx.c @@ -0,0 +1,99 @@ +/* + * BSD LICENSE + * + * Copyright (C) Cavium networks Ltd. 2017. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Cavium networks nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * https://github.com/halayli/lthread which carries the following license. + * + * Copyright (C) 2012, Hasan Alayli + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +#include + +void +ctx_switch(struct ctx *new_ctx __rte_unused, struct ctx *curr_ctx __rte_unused) +{ + /* SAVE CURRENT CONTEXT */ + asm volatile ( + /* Save SP */ + "mov x3, sp\n" + "str x3, [x1, #0]\n" + + /* Save FP and LR */ + "stp x29, x30, [x1, #8]\n" + + /* Save Callee Saved Regs x19 - x28 */ + "stp x19, x20, [x1, #24]\n" + "stp x21, x22, [x1, #40]\n" + "stp x23, x24, [x1, #56]\n" + "stp x25, x26, [x1, #72]\n" + "stp x27, x28, [x1, #88]\n" + ); + + /* RESTORE NEW CONTEXT */ + asm volatile ( + /* Restore SP */ + "ldr x3, [x0, #0]\n" + "mov sp, x3\n" + + /* Restore FP and LR */ + "ldp x29, x30, [x0, #8]\n" + + /* Restore Callee Saved Regs x19 - x28 */ + "ldp x19, x20, [x0, #24]\n" + "ldp x21, x22, [x0, #40]\n" + "ldp x23, x24, [x0, #56]\n" + "ldp x25, x26, [x0, #72]\n" + "ldp x27, x28, [x0, #88]\n" + ); +} diff --git a/examples/performance-thread/common/arch/arm64/ctx.h b/examples/performance-thread/common/arch/arm64/ctx.h new file mode 100644 index 000000000..27a124d1b --- /dev/null +++ b/examples/performance-thread/common/arch/arm64/ctx.h @@ -0,0 +1,95 @@ +/* + * BSD LICENSE + * + * Copyright (C) Cavium networks Ltd. 2017. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Cavium networks nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * https://github.com/halayli/lthread which carries the following license. + * + * Copyright (C) 2012, Hasan Alayli + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef CTX_H +#define CTX_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * CPU context registers + */ +struct ctx { + void *sp; /* 0 */ + void *fp; /* 8 */ + void *lr; /* 16 */ + void *r19; /* 24 */ + void *r20; /* 32 */ + void *r21; /* 40 */ + void *r22; /* 48 */ + void *r23; /* 56 */ + void *r24; /* 64 */ + void *r25; /* 72 */ + void *r26; /* 80 */ + void *r27; /* 88 */ + void *r28; /* 96 */ +}; + + +void +ctx_switch(struct ctx *new_ctx, struct ctx *curr_ctx); + + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_CTX_H_ */ diff --git a/examples/performance-thread/common/arch/arm64/stack.h b/examples/performance-thread/common/arch/arm64/stack.h new file mode 100644 index 000000000..1e7c6444c --- /dev/null +++ b/examples/performance-thread/common/arch/arm64/stack.h @@ -0,0 +1,111 @@ +/* + * BSD LICENSE + * + * Copyright (C) Cavium networks Ltd. 2017. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Cavium networks nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * https://github.com/halayli/lthread which carries the following license. + * + * Copyright (C) 2012, Hasan Alayli + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#ifndef STACK_H +#define STACK_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "lthread_int.h" + +/* + * Sets up the initial stack for the lthread. + */ +static inline void +arch_set_stack(struct lthread *lt, void *func) +{ + void **stack_top = (void *)((char *)(lt->stack) + lt->stack_size); + + /* + * Align stack_top to 16 bytes. Arm64 has the constraint that the + * stack pointer must always be quad-word aligned. + */ + stack_top = (void **)(((unsigned long)(stack_top)) & ~0xfUL); + + /* + * First Stack Frame + */ + stack_top[0] = NULL; + stack_top[-1] = NULL; + + /* + * Initialize the context + */ + lt->ctx.fp = &stack_top[-1]; + lt->ctx.sp = &stack_top[-2]; + + /* + * Here only the address of _lthread_exec is saved as the link + * register value. The argument to _lthread_exec i.e the address of + * the lthread struct is not saved. This is because the first + * argument to ctx_switch is the address of the new context, + * which also happens to be the address of required lthread struct. + * So while returning from ctx_switch into _thread_exec, parameter + * register x0 will always contain the required value. + */ + lt->ctx.lr = func; +} + +#ifdef __cplusplus +} +#endif + +#endif /* STACK_H_ */ diff --git a/examples/performance-thread/common/arch/x86/stack.h b/examples/performance-thread/common/arch/x86/stack.h new file mode 100644 index 000000000..fe18cf40e --- /dev/null +++ b/examples/performance-thread/common/arch/x86/stack.h @@ -0,0 +1,65 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2017 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef STACK_H +#define STACK_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "lthread_int.h" + +/* + * Sets up the initial stack for the lthread. + */ +static inline void +arch_set_stack(struct lthread *lt, void *func) +{ + char *stack_top = (char *)(lt->stack) + lt->stack_size; + void **s = (void **)stack_top; + + /* set initial context */ + s[-3] = NULL; + s[-2] = (void *)lt; + lt->ctx.rsp = (void *)(stack_top - (4 * sizeof(void *))); + lt->ctx.rbp = (void *)(stack_top - (3 * sizeof(void *))); + lt->ctx.rip = func; +} + +#ifdef __cplusplus +} +#endif + +#endif /* STACK_H_ */ diff --git a/examples/performance-thread/common/common.mk b/examples/performance-thread/common/common.mk index f6cab7718..f1f05fdde 100644 --- a/examples/performance-thread/common/common.mk +++ b/examples/performance-thread/common/common.mk @@ -37,8 +37,14 @@ MKFILE_PATH=$(abspath $(dir $(lastword $(MAKEFILE_LIST)))) -VPATH := $(MKFILE_PATH) $(MKFILE_PATH)/arch/x86 +ifeq ($(CONFIG_RTE_ARCH_X86_64),y) +ARCH_PATH += $(MKFILE_PATH)/arch/x86 +else ifeq ($(CONFIG_RTE_ARCH_ARM64),y) +ARCH_PATH += $(MKFILE_PATH)/arch/arm64 +endif + +VPATH := $(MKFILE_PATH) $(ARCH_PATH) SRCS-y += lthread.c lthread_sched.c lthread_cond.c lthread_tls.c lthread_mutex.c lthread_diag.c ctx.c -INCLUDES += -I$(MKFILE_PATH) -I$(MKFILE_PATH)/arch/x86/ +INCLUDES += -I$(MKFILE_PATH) -I$(ARCH_PATH) diff --git a/examples/performance-thread/common/lthread.c b/examples/performance-thread/common/lthread.c index 062275a43..7d76c8c46 100644 --- a/examples/performance-thread/common/lthread.c +++ b/examples/performance-thread/common/lthread.c @@ -76,6 +76,7 @@ #include #include +#include #include "lthread_api.h" #include "lthread.h" @@ -190,19 +191,11 @@ _lthread_init(struct lthread *lt, */ void _lthread_set_stack(struct lthread *lt, void *stack, size_t stack_size) { - char *stack_top = (char *)stack + stack_size; - void **s = (void **)stack_top; - /* set stack */ lt->stack = stack; lt->stack_size = stack_size; - /* set initial context */ - s[-3] = NULL; - s[-2] = (void *)lt; - lt->ctx.rsp = (void *)(stack_top - (4 * sizeof(void *))); - lt->ctx.rbp = (void *)(stack_top - (3 * sizeof(void *))); - lt->ctx.rip = (void *)_lthread_exec; + arch_set_stack(lt, _lthread_exec); } /* diff --git a/examples/performance-thread/l3fwd-thread/main.c b/examples/performance-thread/l3fwd-thread/main.c index 2d98473eb..3d9739e91 100644 --- a/examples/performance-thread/l3fwd-thread/main.c +++ b/examples/performance-thread/l3fwd-thread/main.c @@ -225,7 +225,7 @@ static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT; static uint64_t dest_eth_addr[RTE_MAX_ETHPORTS]; static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS]; -static __m128i val_eth[RTE_MAX_ETHPORTS]; +static xmm_t val_eth[RTE_MAX_ETHPORTS]; /* replace first 12B of the ethernet header. */ #define MASK_ETH 0x3f