From patchwork Wed Aug 23 14:11:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shreyansh Jain X-Patchwork-Id: 27773 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 4DFA17D7B; Wed, 23 Aug 2017 16:02:39 +0200 (CEST) Received: from NAM02-SN1-obe.outbound.protection.outlook.com (mail-sn1nam02on0083.outbound.protection.outlook.com [104.47.36.83]) by dpdk.org (Postfix) with ESMTP id 6066F7D5E for ; Wed, 23 Aug 2017 16:02:37 +0200 (CEST) Received: from CY1PR03CA0039.namprd03.prod.outlook.com (2603:10b6:600::49) by SN2PR03MB2271.namprd03.prod.outlook.com (2603:10b6:804:d::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1385.9; Wed, 23 Aug 2017 14:02:35 +0000 Received: from BL2FFO11FD021.protection.gbl (2a01:111:f400:7c09::155) by CY1PR03CA0039.outlook.office365.com (2603:10b6:600::49) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1362.18 via Frontend Transport; Wed, 23 Aug 2017 14:02:35 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD021.mail.protection.outlook.com (10.173.161.100) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1341.15 via Frontend Transport; Wed, 23 Aug 2017 14:02:35 +0000 Received: from Tophie.ap.freescale.net ([10.232.14.39]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id v7NE2Q2n004389; Wed, 23 Aug 2017 07:02:32 -0700 From: Shreyansh Jain To: CC: , Date: Wed, 23 Aug 2017 19:41:36 +0530 Message-ID: <20170823141213.25476-4-shreyansh.jain@nxp.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170823141213.25476-1-shreyansh.jain@nxp.com> References: <1499179471-19145-1-git-send-email-shreyansh.jain@nxp.com> <20170823141213.25476-1-shreyansh.jain@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131479705554594633; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(336005)(39860400002)(39380400002)(2980300002)(1109001)(1110001)(339900001)(189002)(199003)(81156014)(81166006)(50466002)(8676002)(1076002)(2906002)(6916009)(48376002)(2950100002)(86362001)(68736007)(105606002)(47776003)(106466001)(2351001)(626005)(50226002)(189998001)(8936002)(33646002)(4326008)(76176999)(50986999)(54906002)(356003)(5660300001)(305945005)(110136004)(8656003)(85426001)(77096006)(53936002)(104016004)(498600001)(36756003)(97736004)(5003940100001)(2004002)(473944003); DIR:OUT; SFP:1101; SCL:1; SRVR:SN2PR03MB2271; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; BL2FFO11FD021; 1:nOnS4cDjiyNt6KUVP5p2Eq/O2LwsfnTRbtGmplMyB4lRraWsfdT9h1ZEEsCsLjd5Z9Lsql4lvnD9zmm3ZSzHYfDe4IWFK7jbSs1U9Pl6WTtImACaGJ4jHE4Xy8fEZmwe MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 2a1a3e28-d8c1-48c1-2b49-08d4ea2f9b38 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(300000503095)(300135400095)(2017052603031)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095); SRVR:SN2PR03MB2271; X-Microsoft-Exchange-Diagnostics: 1; SN2PR03MB2271; 3:8yQJpiilA4yZ3WQPQQdVrPN4LazY4HTiq4rSsCSME8LAIuQmwtwqv6q64P9PvRaN0051gGjNoVIATUEKKtgFB+s2TUXwkFOIB/Gy7NTZw6Uvaiw+oLvxsctFiPQDshAIdLE1O4gKEWB/W5+yRUZFU5U7HIj3kubfTAhKvVKqqHn5WK5y/BSlwBpx6DfmLGub06kRvqsfrlg3NOldycZjt0lsUHCXThj64RJWz7gcPdHvlM1HyilBk9p/AlT65aV0WSzET5NF4Hu3LerOahOI34uQUR0stKGaKGDD2SMcOR9x3GQ4BrHryqSzj9SmAje4JRjw0dyYOZmBSw5vFPs9gIAf8POThbmygVuYSz2PDd0=; 25:SzSc9JbNdWBY5i+r0hGb92E1E35bY/kLOwCNo8xsQ5lz81NzuT68xKpy/MdUS5kxvEY9ngC1wbBZCgTefrhOJia6u8Qv2FUDTkUaFtHJcShTvd8TG0HqJzLLYzTeq4bJOJETKTbucn02bi2Ccgbek3AzuYzg490LMHinTOVt7gbBfe0fIUmwvZrX9qXHl/9ddKJKzflUkq7hB7iVg9rfae8d3aj9+XYMY6iXC5gJyd3PUeQt4ClhcK3RTQAklz9Z123bBUN+KuB3V+JYpWFeqe6r0oDA5V/Ip1l2l5h+Wjbxnw4HwBh2ZbYr+LtU5aMUQUvn3mTcxLimwIxYkZa4zQ== X-MS-TrafficTypeDiagnostic: SN2PR03MB2271: X-Microsoft-Exchange-Diagnostics: 1; SN2PR03MB2271; 31:UYWrJySN6xXjgeyqJU4QJ3Hhn03FRsyTj8ka6pSsT9Sw+omFk8pJQO1t5n7ns/Q1vxdR+PUMDveuhWHuXNpXz/qaM3vKQeqXEKCHioIaRLtwvvJQx+RNah7ewo9W3GyTTl0vgdobXlOaVam+ddLEvk79DzIb9zknHGdV0wHFA8YOzNq3qijTEkVZaoD0vcpzfxqqIT3CHP8JR+1ZavMxwdGMPy/8EpfN1swtNMay6xI=; 4:I3yiWRM8Ii53gq/Pf594riTUMEqe7DvUyj2PdLKoGHfvITt84jBr2EmZhaofW8fqjpnVENYwOsmtzexqWTifEvYt2RxafHoT9P20yJaZ0FfjEIIWmsGb0pWitmPukx8mdOGiH65jvT/aTXWgX8gMH+P8+PaNIm3l6IQpi0uSvwPd9sifE+GHBM1ALoe1ld9yfIPv7Bla+sVFmJCxmIBcm503N6Pb3wBgU3LTcZpY4+jBtqPuaJQL72r3aAsOnFc/8sT8A1N8UQTzEhT6e1rwYkRFYKe4fPy2xBI6NZZ02cs= X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(601004)(2401047)(8121501046)(13016025)(13018025)(5005006)(100000703101)(100105400095)(3002001)(10201501046)(93006095)(93001095)(6055026)(6096035)(20161123563025)(20161123556025)(20161123561025)(201703131430075)(201703131441075)(201703131448075)(201703131433075)(201703161259150)(20161123559100)(20161123565025)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:SN2PR03MB2271; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:SN2PR03MB2271; X-Forefront-PRVS: 040866B734 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; SN2PR03MB2271; 23:p15ybCkS1H/XFWGb3n90mYZPR6ipAuECUfLbccmMY?= iAv67tu/zmSIIJdE+XhpVjPgA8muzksH2hxQHHmh+fD032VFhIP7IIyg4Zcgppw4jrhswAGUs/GQSOYy8O34J+V52IarFP0pDBPsU+j1L63l4A7TT34gV+mvlUSa7krE4Hte7LXbz/ZLjKUS3UDGiZO2xN+0Mtl2XwOBJZML9kvv+UEgF0ynmDMSdJaywdE5hsnp4qbvPI91MaXV9FK0PHc2GNDnYmRzEgaJO97ErmaeIYLwhMI0oPaMpjChdAkO674xWtik49IhNTzq5rlza0fEGTcbds9BJqlA0V3LGc9uzVahetidSWgVXoi/l+/xYgwclLUteu3jqsOW/Jj9q7dBsYNjfcDk07ncb+D03jKqc+FX9MtLuO8ZWj53OeysgaBc9UVdYR8KVPRlJG3iaKjWP3c3GA/qjLYqQ7RWgpgwhU6PC5dJptgNmlneT54Ll+qdy/jbJrGGo1LUmkhCq2RVVbVVSLR0LQslCvc6TYOcvWVP2v+tAIfjWvxi/sOIg9XkV8/zxYtlfBRecTBD+NV+MEnXTooaYJZTAgyLP7QwL6Jd2Mc8L0Y67WCCtwkbbjaQ51rb/GrG9RtOFsQloRb/fKyVC3W44lkHbwgBv0D+nRQVmaUfr1EmSjK6Ef+7TnlPLAH1C7uykyxGEm666nd5TAxCYqNZjsKyhm196wq0dAPY/U6g6AhyE89ROMz18EI9TM6WXo6Zdt7kQbCP8oO8Yu/R0EAGcHnt1oE7Gwr63vZlRnqWzagkwmpYz5GBN8B7UHqQIJ+FutYVdKaCGEI1q6pBLQoEkSAUyvZrhCjm78M0Ce8me85SYc8pXwTPNIQG4R9ma/cU5QKOIZAgBm6bBjkWXhv+cnNiBIykBpPbPcjQ3qCHpqqqWIxH16HqAUdiaCCgqKvRYT7yrPTdcDrnULqNU13SP1c56KiWxtEGrHBYfWIzghzHebT/6s4KJCYm5OWUiDOakQ05auSXaaaoy5LZiDp84UDo+uzLqE1tuVWzg52tpE/0Tl+t7GAQ8ziC+Jx9tPFHuKa/APRc41oejlkLDuRLqsZ+0Dkwdy1JNBkUAzGxEaJJ1Og+rNuYGZhibgU6s+Pg54poG1QLIPQRvKv7ZPgCTSJaONANz5SKk+vniNd9sjZIlcDl3nWmRg= X-Microsoft-Exchange-Diagnostics: 1; SN2PR03MB2271; 6:d6CXQc3OcX6eltOcPAjUTXu8FWxH6gHPsRsvAcqDOPgtoXWWPDHJ/mLqf3BpfQutm99C86jDB9t5hL6TCcOKR2Id2DY8bwxVsI8o8OW3bXyt5sHyeVLN/dueE5Y/nMIZXMDmqE2KFjRYt4x2W2RU+qjHUHABAyVIa/Nt11E9zqyJ7AbDzR+pMBvL2H2lkwGYnEe0CzuchogSvVxOPMR+ShZqzt5aA1LjqvMDnRsmZq8Rbx6QCwPxtvyAneQPWpOIInwnA6Y+Qf+c4ZDnA0f8F+DdxUFq5UzJcf/fCfCit316p5zXirNkfQtn6Ee9wgSdMqRde5UNtdSJweYz39z+uQ==; 5:QdLIEWU1Koa39GlcyQy8gsc8bZI9Rv19fm4FI8qZriYUstj6xq1IR3axxLDpozKlDS3XBvGG+47mjxWNl3udvhyrukFXcurtZ6hes6e7CwF/PAIBRg1mXjrab7nFbRkKrLMkG/VSC1Ypzu2WcZL9tw==; 24:39dDe3hgKrVJ/zqR0GXT4XbkW6e4uPHipsWB9SPHV7lBbUJYc8nmENONP3WWSzRXDi7FZ6jyTJo5dvQogrSpqA6PKHdYHrgLqidHRLrO8y0=; 7:GxSH0/+hPTsId/wvYRMrxzQ7ZlYoBAGx2Z1VwDnJ0pukmKvZPb6dkIiW+g+ycSE4oez02WEx62OweWN5feiMjOZUfsaWCyVMJxalqcWun6/M42pk44UWFnOGBSNJmkyO0rYKHarJGBKuA9mWxlGx8gc676cS3hNh9yocKLKSDq4q9tpXJ1kq6DEvVQxSoSIaVW+LB/JpmblVgZnayRh1sWwEmostTG87mITG1H6EWK0= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Aug 2017 14:02:35.1162 (UTC) X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN2PR03MB2271 Subject: [dpdk-dev] [PATCH v3 03/40] bus/dpaa: add compatibility and helper macros X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hemant Agrawal Linked list, bit operations and compatibility macros. Signed-off-by: Geoff Thorpe Signed-off-by: Hemant Agrawal --- v3: - Removed checkpatch warning and duplicate PER_CPU macro --- drivers/bus/dpaa/include/compat.h | 389 +++++++++++++++++++++++++++++++++++ drivers/bus/dpaa/include/dpaa_bits.h | 65 ++++++ drivers/bus/dpaa/include/dpaa_list.h | 101 +++++++++ 3 files changed, 555 insertions(+) create mode 100644 drivers/bus/dpaa/include/compat.h create mode 100644 drivers/bus/dpaa/include/dpaa_bits.h create mode 100644 drivers/bus/dpaa/include/dpaa_list.h diff --git a/drivers/bus/dpaa/include/compat.h b/drivers/bus/dpaa/include/compat.h new file mode 100644 index 0000000..a1fd53e --- /dev/null +++ b/drivers/bus/dpaa/include/compat.h @@ -0,0 +1,389 @@ +/*- + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * BSD LICENSE + * + * Copyright 2011 Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the above-listed copyright holders nor the + * names of any contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * GPL LICENSE SUMMARY + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __COMPAT_H +#define __COMPAT_H + +#include + +#ifndef _GNU_SOURCE +#define _GNU_SOURCE +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* The following definitions are primarily to allow the single-source driver + * interfaces to be included by arbitrary program code. Ie. for interfaces that + * are also available in kernel-space, these definitions provide compatibility + * with certain attributes and types used in those interfaces. + */ + +/* Required compiler attributes */ +#define __maybe_unused __rte_unused +#define __always_unused __rte_unused +#define __packed __rte_packed +#define noinline __attribute__((noinline)) + +#define L1_CACHE_BYTES 64 +#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) +#define __stringify_1(x) #x +#define __stringify(x) __stringify_1(x) + +#ifdef ARRAY_SIZE +#undef ARRAY_SIZE +#endif +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) + +/* Debugging */ +#define prflush(fmt, args...) \ + do { \ + printf(fmt, ##args); \ + fflush(stdout); \ + } while (0) + +#define pr_crit(fmt, args...) prflush("CRIT:" fmt, ##args) +#define pr_err(fmt, args...) prflush("ERR:" fmt, ##args) +#define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args) +#define pr_info(fmt, args...) prflush(fmt, ##args) + +#ifdef RTE_LIBRTE_DPAA_DEBUG_BUS +#ifdef pr_debug +#undef pr_debug +#endif +#define pr_debug(fmt, args...) printf(fmt, ##args) +#else +#define pr_debug(fmt, args...) {} +#endif + +#define ASSERT(x) do {\ + if (!(x)) \ + rte_panic("DPAA: x"); \ +} while (0) +#define DPAA_BUG_ON(x) ASSERT(!(x)) + +/* Required types */ +typedef uint8_t u8; +typedef uint16_t u16; +typedef uint32_t u32; +typedef uint64_t u64; +typedef uint64_t dma_addr_t; +typedef cpu_set_t cpumask_t; +typedef uint32_t phandle; +typedef uint32_t gfp_t; +typedef uint32_t irqreturn_t; + +#define IRQ_HANDLED 0 +#define request_irq qbman_request_irq +#define free_irq qbman_free_irq + +#define __iomem +#define GFP_KERNEL 0 +#define __raw_readb(p) (*(const volatile unsigned char *)(p)) +#define __raw_readl(p) (*(const volatile unsigned int *)(p)) +#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); } + +/* to be used as an upper-limit only */ +#define NR_CPUS 64 + +/* Waitqueue stuff */ +typedef struct { } wait_queue_head_t; +#define DECLARE_WAIT_QUEUE_HEAD(x) int dummy_##x __always_unused +#define wake_up(x) do { } while (0) + +/* I/O operations */ +static inline u32 in_be32(volatile void *__p) +{ + volatile u32 *p = __p; + return rte_be_to_cpu_32(*p); +} + +static inline void out_be32(volatile void *__p, u32 val) +{ + volatile u32 *p = __p; + *p = rte_cpu_to_be_32(val); +} + +#define dcbt_ro(p) __builtin_prefetch(p, 0) +#define dcbt_rw(p) __builtin_prefetch(p, 1) + +#define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); } +#define dcbz_64(p) dcbz(p) +#define hwsync() rte_rmb() +#define lwsync() rte_wmb() +#define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); } +#define dcbf_64(p) dcbf(p) +#define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); } + +#define dcbit_ro(p) \ + do { \ + dccivac(p); \ + asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p)); \ + } while (0) + +#define barrier() { asm volatile ("" : : : "memory"); } +#define cpu_relax barrier + +static inline uint64_t mfatb(void) +{ + uint64_t ret, ret_new, timeout = 200; + + asm volatile ("mrs %0, cntvct_el0" : "=r" (ret)); + asm volatile ("mrs %0, cntvct_el0" : "=r" (ret_new)); + while (ret != ret_new && timeout--) { + ret = ret_new; + asm volatile ("mrs %0, cntvct_el0" : "=r" (ret_new)); + } + DPAA_BUG_ON(!timeout && (ret != ret_new)); + return ret * 64; +} + +/* Spin for a few cycles without bothering the bus */ +static inline void cpu_spin(int cycles) +{ + uint64_t now = mfatb(); + + while (mfatb() < (now + cycles)) + ; +} + +/* Qman/Bman API inlines and macros; */ +#ifdef lower_32_bits +#undef lower_32_bits +#endif +#define lower_32_bits(x) ((u32)(x)) + +#ifdef upper_32_bits +#undef upper_32_bits +#endif +#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16)) + +/* + * Swap bytes of a 48-bit value. + */ +static inline uint64_t +__bswap_48(uint64_t x) +{ + return ((x & 0x0000000000ffULL) << 40) | + ((x & 0x00000000ff00ULL) << 24) | + ((x & 0x000000ff0000ULL) << 8) | + ((x & 0x0000ff000000ULL) >> 8) | + ((x & 0x00ff00000000ULL) >> 24) | + ((x & 0xff0000000000ULL) >> 40); +} + +/* + * Swap bytes of a 40-bit value. + */ +static inline uint64_t +__bswap_40(uint64_t x) +{ + return ((x & 0x00000000ffULL) << 32) | + ((x & 0x000000ff00ULL) << 16) | + ((x & 0x0000ff0000ULL)) | + ((x & 0x00ff000000ULL) >> 16) | + ((x & 0xff00000000ULL) >> 32); +} + +/* + * Swap bytes of a 24-bit value. + */ +static inline uint32_t +__bswap_24(uint32_t x) +{ + return ((x & 0x0000ffULL) << 16) | + ((x & 0x00ff00ULL)) | + ((x & 0xff0000ULL) >> 16); +} + +#define be64_to_cpu(x) rte_be_to_cpu_64(x) +#define be32_to_cpu(x) rte_be_to_cpu_32(x) +#define be16_to_cpu(x) rte_be_to_cpu_16(x) + +#define cpu_to_be64(x) rte_cpu_to_be_64(x) +#define cpu_to_be32(x) rte_cpu_to_be_32(x) +#define cpu_to_be16(x) rte_cpu_to_be_16(x) + +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN + +#define cpu_to_be48(x) __bswap_48(x) +#define be48_to_cpu(x) __bswap_48(x) + +#define cpu_to_be40(x) __bswap_40(x) +#define be40_to_cpu(x) __bswap_40(x) + +#define cpu_to_be24(x) __bswap_24(x) +#define be24_to_cpu(x) __bswap_24(x) + +#else /* RTE_BIG_ENDIAN */ + +#define cpu_to_be48(x) (x) +#define be48_to_cpu(x) (x) + +#define cpu_to_be40(x) (x) +#define be40_to_cpu(x) (x) + +#define cpu_to_be24(x) (x) +#define be24_to_cpu(x) (x) + +#endif /* RTE_BIG_ENDIAN */ + +/* When copying aligned words or shorts, try to avoid memcpy() */ +/* memcpy() stuff - when you know alignments in advance */ +#define CONFIG_TRY_BETTER_MEMCPY + +#ifdef CONFIG_TRY_BETTER_MEMCPY +static inline void copy_words(void *dest, const void *src, size_t sz) +{ + u32 *__dest = dest; + const u32 *__src = src; + size_t __sz = sz >> 2; + + DPAA_BUG_ON((unsigned long)dest & 0x3); + DPAA_BUG_ON((unsigned long)src & 0x3); + DPAA_BUG_ON(sz & 0x3); + while (__sz--) + *(__dest++) = *(__src++); +} + +static inline void copy_shorts(void *dest, const void *src, size_t sz) +{ + u16 *__dest = dest; + const u16 *__src = src; + size_t __sz = sz >> 1; + + DPAA_BUG_ON((unsigned long)dest & 0x1); + DPAA_BUG_ON((unsigned long)src & 0x1); + DPAA_BUG_ON(sz & 0x1); + while (__sz--) + *(__dest++) = *(__src++); +} + +static inline void copy_bytes(void *dest, const void *src, size_t sz) +{ + u8 *__dest = dest; + const u8 *__src = src; + + while (sz--) + *(__dest++) = *(__src++); +} +#else +#define copy_words memcpy +#define copy_shorts memcpy +#define copy_bytes memcpy +#endif + +/* Allocator stuff */ +#define kmalloc(sz, t) malloc(sz) +#define vmalloc(sz) malloc(sz) +#define kfree(p) { if (p) free(p); } +static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused) +{ + void *ptr = malloc(sz); + + if (ptr) + memset(ptr, 0, sz); + return ptr; +} + +static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused) +{ + void *p; + + if (posix_memalign(&p, 4096, 4096)) + return 0; + memset(p, 0, 4096); + return (unsigned long)p; +} + +/* Spinlock stuff */ +#define spinlock_t rte_spinlock_t +#define __SPIN_LOCK_UNLOCKED(x) RTE_SPINLOCK_INITIALIZER +#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x) +#define spin_lock_init(x) rte_spinlock_init(x) +#define spin_lock_destroy(x) +#define spin_lock(x) rte_spinlock_lock(x) +#define spin_unlock(x) rte_spinlock_unlock(x) +#define spin_lock_irq(x) spin_lock(x) +#define spin_unlock_irq(x) spin_unlock(x) +#define spin_lock_irqsave(x, f) spin_lock_irq(x) +#define spin_unlock_irqrestore(x, f) spin_unlock_irq(x) + +#define atomic_t rte_atomic32_t +#define atomic_read(v) rte_atomic32_read(v) +#define atomic_set(v, i) rte_atomic32_set(v, i) + +#define atomic_inc(v) rte_atomic32_add(v, 1) +#define atomic_dec(v) rte_atomic32_sub(v, 1) + +#define atomic_inc_and_test(v) rte_atomic32_inc_and_test(v) +#define atomic_dec_and_test(v) rte_atomic32_dec_and_test(v) + +#define atomic_inc_return(v) rte_atomic32_add_return(v, 1) +#define atomic_dec_return(v) rte_atomic32_sub_return(v, 1) +#define atomic_sub_and_test(i, v) (rte_atomic32_sub_return(v, i) == 0) + +#include +#include + +#endif /* __COMPAT_H */ diff --git a/drivers/bus/dpaa/include/dpaa_bits.h b/drivers/bus/dpaa/include/dpaa_bits.h new file mode 100644 index 0000000..71f2d80 --- /dev/null +++ b/drivers/bus/dpaa/include/dpaa_bits.h @@ -0,0 +1,65 @@ +/*- + * BSD LICENSE + * + * Copyright 2017 NXP. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of NXP nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __DPAA_BITS_H +#define __DPAA_BITS_H + +/* Bitfield stuff. */ +#define BITS_PER_ULONG (sizeof(unsigned long) << 3) +#define SHIFT_PER_ULONG (((1 << 5) == BITS_PER_ULONG) ? 5 : 6) +#define BITS_MASK(idx) (1UL << ((idx) & (BITS_PER_ULONG - 1))) +#define BITS_IDX(idx) ((idx) >> SHIFT_PER_ULONG) + +static inline void dpaa_set_bits(unsigned long mask, + volatile unsigned long *p) +{ + *p |= mask; +} + +static inline void dpaa_set_bit(int idx, volatile unsigned long *bits) +{ + dpaa_set_bits(BITS_MASK(idx), bits + BITS_IDX(idx)); +} + +static inline void dpaa_clear_bits(unsigned long mask, + volatile unsigned long *p) +{ + *p &= ~mask; +} + +static inline void dpaa_clear_bit(int idx, + volatile unsigned long *bits) +{ + dpaa_clear_bits(BITS_MASK(idx), bits + BITS_IDX(idx)); +} + +#endif /* __DPAA_BITS_H */ diff --git a/drivers/bus/dpaa/include/dpaa_list.h b/drivers/bus/dpaa/include/dpaa_list.h new file mode 100644 index 0000000..871e612 --- /dev/null +++ b/drivers/bus/dpaa/include/dpaa_list.h @@ -0,0 +1,101 @@ +/*- + * BSD LICENSE + * + * Copyright 2017 NXP. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of NXP nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __DPAA_LIST_H +#define __DPAA_LIST_H + +/****************/ +/* Linked-lists */ +/****************/ + +struct list_head { + struct list_head *prev; + struct list_head *next; +}; + +#define COMPAT_LIST_HEAD(n) \ +struct list_head n = { \ + .prev = &n, \ + .next = &n \ +} + +#define INIT_LIST_HEAD(p) \ +do { \ + struct list_head *__p298 = (p); \ + __p298->next = __p298; \ + __p298->prev = __p298->next; \ +} while (0) +#define list_entry(node, type, member) \ + (type *)((void *)node - offsetof(type, member)) +#define list_empty(p) \ +({ \ + const struct list_head *__p298 = (p); \ + ((__p298->next == __p298) && (__p298->prev == __p298)); \ +}) +#define list_add(p, l) \ +do { \ + struct list_head *__p298 = (p); \ + struct list_head *__l298 = (l); \ + __p298->next = __l298->next; \ + __p298->prev = __l298; \ + __l298->next->prev = __p298; \ + __l298->next = __p298; \ +} while (0) +#define list_add_tail(p, l) \ +do { \ + struct list_head *__p298 = (p); \ + struct list_head *__l298 = (l); \ + __p298->prev = __l298->prev; \ + __p298->next = __l298; \ + __l298->prev->next = __p298; \ + __l298->prev = __p298; \ +} while (0) +#define list_for_each(i, l) \ + for (i = (l)->next; i != (l); i = i->next) +#define list_for_each_safe(i, j, l) \ + for (i = (l)->next, j = i->next; i != (l); \ + i = j, j = i->next) +#define list_for_each_entry(i, l, name) \ + for (i = list_entry((l)->next, typeof(*i), name); &i->name != (l); \ + i = list_entry(i->name.next, typeof(*i), name)) +#define list_for_each_entry_safe(i, j, l, name) \ + for (i = list_entry((l)->next, typeof(*i), name), \ + j = list_entry(i->name.next, typeof(*j), name); \ + &i->name != (l); \ + i = j, j = list_entry(j->name.next, typeof(*j), name)) +#define list_del(i) \ +do { \ + (i)->next->prev = (i)->prev; \ + (i)->prev->next = (i)->next; \ +} while (0) + +#endif /* __DPAA_LIST_H */