[v2,07/15] net/failsafe: add to meson build

Message ID 20180608212048.67261-8-bruce.richardson@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series add meson support for more net drivers |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Bruce Richardson June 8, 2018, 9:20 p.m. UTC
  CC: Gaetan Rivet <gaetan.rivet@6wind.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
 drivers/net/failsafe/meson.build | 23 +++++++++++++++++++++++
 drivers/net/meson.build          |  2 +-
 2 files changed, 24 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/failsafe/meson.build
  

Patch

diff --git a/drivers/net/failsafe/meson.build b/drivers/net/failsafe/meson.build
new file mode 100644
index 000000000..a249ff4af
--- /dev/null
+++ b/drivers/net/failsafe/meson.build
@@ -0,0 +1,23 @@ 
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2018 Intel Corporation
+
+cflags += '-std=gnu99'
+cflags += '-D_DEFAULT_SOURCE'
+cflags += '-D_XOPEN_SOURCE=700'
+cflags += '-pedantic'
+if host_machine.system() == 'linux'
+	cflags += '-DLINUX'
+else
+	cflags += '-DBSD'
+endif
+
+allow_experimental_apis = true
+
+sources = files('failsafe_args.c',
+	'failsafe.c',
+	'failsafe_eal.c',
+	'failsafe_ether.c',
+	'failsafe_flow.c',
+	'failsafe_intr.c',
+	'failsafe_ops.c',
+	'failsafe_rxtx.c')
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index d4c7d58ab..decb1519a 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -4,7 +4,7 @@ 
 drivers = ['af_packet', 'ark', 'avp',
 	'axgbe', 'bonding', 'bnx2x',
 	'bnxt', 'cxgbe', 'dpaa', 'dpaa2',
-	'e1000', 'ena', 'enic',
+	'e1000', 'ena', 'enic', 'failsafe',
 	'fm10k', 'i40e', 'ixgbe',
 	'mvpp2', 'null', 'octeontx', 'pcap', 'ring',
 	'sfc', 'thunderx', 'virtio']