[v2,6/6] meson: add octeontx2 machine config

Message ID 20190107154129.24700-6-pbhagavatula@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series None |

Checks

Context Check Description
ci/Intel-compilation success Compilation OK

Commit Message

Pavan Nikhilesh Bhagavatula Jan. 7, 2019, 3:42 p.m. UTC
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Meson configuration for Marvell octeontx2 SoC.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 config/arm/meson.build | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
  

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index aca285b6a..8086357a1 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -60,6 +60,13 @@  flags_thunderx2_extra = [
 	['RTE_MAX_NUMA_NODES', 2],
 	['RTE_MAX_LCORE', 256],
 	['RTE_USE_C11_MEM_MODEL', true]]
+flags_octeontx2_extra = [
+	['RTE_MACHINE', '"octeontx2"'],
+	['RTE_MAX_NUMA_NODES', 1],
+	['RTE_MAX_LCORE', 24],
+	['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
+	['RTE_LIBRTE_VHOST_NUMA', false],
+	['RTE_EAL_IGB_UIO', false]]
 
 machine_args_generic = [
 	['default', ['-march=armv8-a+crc+crypto']],
@@ -77,7 +84,8 @@  machine_args_cavium = [
 	['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra],
 	['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra],
 	['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra],
-	['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra]]
+	['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra],
+	['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]]
 
 ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321)
 impl_generic = ['Generic armv8', flags_generic, machine_args_generic]