From patchwork Fri Mar 6 13:44:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 66344 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B129EA056A; Fri, 6 Mar 2020 14:44:15 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4B4322BA8; Fri, 6 Mar 2020 14:44:15 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id A420AFEB for ; Fri, 6 Mar 2020 14:44:13 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 026De8JZ015070 for ; Fri, 6 Mar 2020 05:44:13 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=pTEzmfvdmOEDwopQjJHI3vTocIHOeK5axUh+MHgGN88=; b=LAeo06NiidScs7dXwYCTWSVyk8PX8XNMrg0Y255PjB7xY1UAbPaBjjymfe615hA6jZHl Q0BeiPDyS7OVRzfqcld0tES0rzzHcSdXP7hukPfllusruxPuGzxzgMUUePWHZRsTkxim bUjBHuWqDnw5PlqIHQvaiAHEDC0GG3p26AVtGzOCMzgGPOq8R9jk7f7zJJEtXAnTlG8P 7mo5Dtj8gW/IyB6efH324/DamA8D6icdhPIwW0qqU+jLDxIkt01wjPLmuYEb2Bih1WXA 12tzkPTKEIJn85QhPf7Q2j41uKSa/K89/vmeEz8hKZwKOAnWICZdbPYO5MMg0rygb/gp hg== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2yhn0yd2k5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 06 Mar 2020 05:44:12 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 6 Mar 2020 05:44:10 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 6 Mar 2020 05:44:10 -0800 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 22B303F703F; Fri, 6 Mar 2020 05:44:08 -0800 (PST) From: Nithin Dabilpuram To: Jerin Jacob , Nithin Dabilpuram , Vamsi Attunuru CC: Date: Fri, 6 Mar 2020 19:14:05 +0530 Message-ID: <20200306134405.32603-1-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-03-06_04:2020-03-06, 2020-03-06 signatures=0 Subject: [dpdk-dev] [PATCH] common/octeontx2: upgrade mbox definition to version 5 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Sync mail box data structures to version 0x0005 to that of kernel AF driver. Signed-off-by: Nithin Dabilpuram Acked-by: Jerin Jacob --- drivers/common/octeontx2/otx2_mbox.h | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h index d192d89..e33b73a 100644 --- a/drivers/common/octeontx2/otx2_mbox.h +++ b/drivers/common/octeontx2/otx2_mbox.h @@ -90,7 +90,7 @@ struct mbox_msghdr { #define OTX2_MBOX_RSP_SIG (0xbeef) /* Signature, for validating corrupted msgs */ uint16_t __otx2_io sig; -#define OTX2_MBOX_VERSION (0x0004) +#define OTX2_MBOX_VERSION (0x0005) /* Version of msg's structure for this ID */ uint16_t __otx2_io ver; /* Offset of next msg within mailbox region */ @@ -255,7 +255,7 @@ M(NIX_TXSCH_ALLOC, 0x8004, nix_txsch_alloc, nix_txsch_alloc_req, \ M(NIX_TXSCH_FREE, 0x8005, nix_txsch_free, nix_txsch_free_req, \ msg_rsp) \ M(NIX_TXSCHQ_CFG, 0x8006, nix_txschq_cfg, nix_txschq_config, \ - msg_rsp) \ + nix_txschq_config) \ M(NIX_STATS_RST, 0x8007, nix_stats_rst, msg_req, msg_rsp) \ M(NIX_VTAG_CFG, 0x8008, nix_vtag_cfg, nix_vtag_config, msg_rsp) \ M(NIX_RSS_FLOWKEY_CFG, 0x8009, nix_rss_flowkey_cfg, \ @@ -693,6 +693,8 @@ enum nix_af_status { NIX_AF_INVAL_NPA_PF_FUNC = -419, NIX_AF_INVAL_SSO_PF_FUNC = -420, NIX_AF_ERR_TX_VTAG_NOSPC = -421, + NIX_AF_ERR_RX_VTAG_INUSE = -422, + NIX_AF_ERR_PTP_CONFIG_FAIL = -423, }; /* For NIX LF context alloc and init */ @@ -733,7 +735,8 @@ struct nix_lf_alloc_rsp { struct nix_lf_free_req { struct mbox_msghdr hdr; -#define NIX_LF_DISABLE_FLOWS 0x1 +#define NIX_LF_DISABLE_FLOWS BIT_ULL(0) +#define NIX_LF_DONT_FREE_TX_VTAG BIT_ULL(1) uint64_t __otx2_io flags; }; @@ -822,6 +825,7 @@ struct nix_txsch_free_req { struct nix_txschq_config { struct mbox_msghdr hdr; uint8_t __otx2_io lvl; /* SMQ/MDQ/TL4/TL3/TL2/TL1 */ + uint8_t __otx2_io read; #define TXSCHQ_IDX_SHIFT 16 #define TXSCHQ_IDX_MASK (BIT_ULL(10) - 1) #define TXSCHQ_IDX(reg, shift) (((reg) >> (shift)) & TXSCHQ_IDX_MASK) @@ -829,6 +833,8 @@ struct nix_txschq_config { #define MAX_REGS_PER_MBOX_MSG 20 uint64_t __otx2_io reg[MAX_REGS_PER_MBOX_MSG]; uint64_t __otx2_io regval[MAX_REGS_PER_MBOX_MSG]; + /* All 0's => overwrite with new value */ + uint64_t __otx2_io regval_mask[MAX_REGS_PER_MBOX_MSG]; }; struct nix_vtag_config { @@ -1229,6 +1235,7 @@ enum npc_af_status { NPC_MCAM_ALLOC_DENIED = -702, NPC_MCAM_ALLOC_FAILED = -703, NPC_MCAM_PERM_DENIED = -704, + NPC_AF_ERR_HIGIG_CONFIG_FAIL = -705, }; struct npc_mcam_alloc_entry_req {