diff --git a/drivers/common/cpt/cpt_hw_types.h b/drivers/common/cpt/cpt_hw_types.h
index e2b127de41..a1f969eb14 100644
--- a/drivers/common/cpt/cpt_hw_types.h
+++ b/drivers/common/cpt/cpt_hw_types.h
@@ -31,7 +31,10 @@ typedef union {
 	uint64_t u64;
 	struct {
 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
-		uint16_t opcode;
+		struct {
+			uint8_t minor;
+			uint8_t major;
+		} opcode;
 		uint16_t param1;
 		uint16_t param2;
 		uint16_t dlen;
@@ -39,7 +42,10 @@ typedef union {
 		uint16_t dlen;
 		uint16_t param2;
 		uint16_t param1;
-		uint16_t opcode;
+		struct {
+			uint8_t major;
+			uint8_t minor;
+		} opcode;
 #endif
 	} s;
 } vq_cmd_word0_t;
diff --git a/drivers/common/cpt/cpt_mcode_defines.h b/drivers/common/cpt/cpt_mcode_defines.h
index 846ceb4a02..56a745f419 100644
--- a/drivers/common/cpt/cpt_mcode_defines.h
+++ b/drivers/common/cpt/cpt_mcode_defines.h
@@ -369,14 +369,6 @@ typedef struct{
 	buf_ptr_t bufs[0];
 } iov_ptr_t;
 
-typedef union opcode_info {
-	uint16_t flags;
-	struct {
-		uint8_t major;
-		uint8_t minor;
-	} s;
-} opcode_info_t;
-
 typedef struct fc_params {
 	/* 0th cache line */
 	union {
diff --git a/drivers/common/cpt/cpt_ucode.h b/drivers/common/cpt/cpt_ucode.h
index 7d938d0c91..664a04e1a0 100644
--- a/drivers/common/cpt/cpt_ucode.h
+++ b/drivers/common/cpt/cpt_ucode.h
@@ -489,7 +489,6 @@ cpt_digest_gen_prep(uint32_t flags,
 	vq_cmd_word0_t vq_cmd_w0;
 	void *c_vaddr, *m_vaddr;
 	uint64_t c_dma, m_dma;
-	opcode_info_t opcode;
 
 	ctx = params->ctx_buf.vaddr;
 	meta_p = &params->meta_buf;
@@ -524,31 +523,27 @@ cpt_digest_gen_prep(uint32_t flags,
 	data_len = AUTH_DLEN(d_lens);
 
 	/*GP op header */
-	vq_cmd_w0.u64 = 0;
+	vq_cmd_w0.s.opcode.minor = 0;
 	vq_cmd_w0.s.param2 = ((uint16_t)hash_type << 8);
 	if (ctx->hmac) {
-		opcode.s.major = CPT_MAJOR_OP_HMAC | CPT_DMA_MODE;
+		vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_HMAC | CPT_DMA_MODE;
 		vq_cmd_w0.s.param1 = key_len;
 		vq_cmd_w0.s.dlen = data_len + ROUNDUP8(key_len);
 	} else {
-		opcode.s.major = CPT_MAJOR_OP_HASH | CPT_DMA_MODE;
+		vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_HASH | CPT_DMA_MODE;
 		vq_cmd_w0.s.param1 = 0;
 		vq_cmd_w0.s.dlen = data_len;
 	}
 
-	opcode.s.minor = 0;
-
 	/* Null auth only case enters the if */
 	if (unlikely(!hash_type && !ctx->enc_cipher)) {
-		opcode.s.major = CPT_MAJOR_OP_MISC;
+		vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_MISC;
 		/* Minor op is passthrough */
-		opcode.s.minor = 0x03;
+		vq_cmd_w0.s.opcode.minor = 0x03;
 		/* Send out completion code only */
 		vq_cmd_w0.s.param2 = 0x1;
 	}
 
-	vq_cmd_w0.s.opcode = opcode.flags;
-
 	/* DPTR has SG list */
 	in_buffer = m_vaddr;
 	dptr_dma = m_dma;
@@ -677,7 +672,6 @@ cpt_enc_hmac_prep(uint32_t flags,
 	vq_cmd_word0_t vq_cmd_w0;
 	void *c_vaddr;
 	uint64_t c_dma;
-	opcode_info_t opcode;
 
 	meta_p = &fc_params->meta_buf;
 	m_vaddr = meta_p->vaddr;
@@ -756,8 +750,8 @@ cpt_enc_hmac_prep(uint32_t flags,
 	}
 
 	/* Encryption */
-	opcode.s.major = CPT_MAJOR_OP_FC;
-	opcode.s.minor = 0;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_FC;
+	vq_cmd_w0.s.opcode.minor = 0;
 
 	if (hash_type == GMAC_TYPE) {
 		encr_offset = 0;
@@ -783,7 +777,6 @@ cpt_enc_hmac_prep(uint32_t flags,
 	}
 
 	/* GP op header */
-	vq_cmd_w0.u64 = 0;
 	vq_cmd_w0.s.param1 = encr_data_len;
 	vq_cmd_w0.s.param2 = auth_data_len;
 	/*
@@ -814,8 +807,6 @@ cpt_enc_hmac_prep(uint32_t flags,
 
 		vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
 
-		vq_cmd_w0.s.opcode = opcode.flags;
-
 		if (likely(iv_len)) {
 			uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr
 						      + OFF_CTRL_LEN);
@@ -844,9 +835,7 @@ cpt_enc_hmac_prep(uint32_t flags,
 		m_vaddr = (uint8_t *)m_vaddr + size;
 		m_dma += size;
 
-		opcode.s.major |= CPT_DMA_MODE;
-
-		vq_cmd_w0.s.opcode = opcode.flags;
+		vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE;
 
 		if (likely(iv_len)) {
 			uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr
@@ -1038,7 +1027,6 @@ cpt_dec_hmac_prep(uint32_t flags,
 	uint32_t passthrough_len = 0;
 	void *m_vaddr, *offset_vaddr;
 	uint64_t m_dma, offset_dma;
-	opcode_info_t opcode;
 	vq_cmd_word0_t vq_cmd_w0;
 	void *c_vaddr;
 	uint64_t c_dma;
@@ -1120,8 +1108,8 @@ cpt_dec_hmac_prep(uint32_t flags,
 	m_dma += size;
 
 	/* Decryption */
-	opcode.s.major = CPT_MAJOR_OP_FC;
-	opcode.s.minor = 1;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_FC;
+	vq_cmd_w0.s.opcode.minor = 1;
 
 	if (hash_type == GMAC_TYPE) {
 		encr_offset = 0;
@@ -1139,7 +1127,6 @@ cpt_dec_hmac_prep(uint32_t flags,
 		outputlen = enc_dlen;
 	}
 
-	vq_cmd_w0.u64 = 0;
 	vq_cmd_w0.s.param1 = encr_data_len;
 	vq_cmd_w0.s.param2 = auth_data_len;
 
@@ -1176,8 +1163,6 @@ cpt_dec_hmac_prep(uint32_t flags,
 
 		vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
 
-		vq_cmd_w0.s.opcode = opcode.flags;
-
 		if (likely(iv_len)) {
 			uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
 						      OFF_CTRL_LEN);
@@ -1207,9 +1192,7 @@ cpt_dec_hmac_prep(uint32_t flags,
 		m_vaddr = (uint8_t *)m_vaddr + size;
 		m_dma += size;
 
-		opcode.s.major |= CPT_DMA_MODE;
-
-		vq_cmd_w0.s.opcode = opcode.flags;
+		vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE;
 
 		if (likely(iv_len)) {
 			uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
@@ -1417,7 +1400,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags,
 	uint64_t *offset_vaddr, offset_dma;
 	uint32_t *iv_s, iv[4];
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 
 	buf_p = &params->meta_buf;
 	m_vaddr = buf_p->vaddr;
@@ -1451,11 +1433,11 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags,
 	m_vaddr = (uint8_t *)m_vaddr + size;
 	m_dma += size;
 
-	opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ZUC_SNOW3G;
 
 	/* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
 
-	opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
+	vq_cmd_w0.s.opcode.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
 			  (0 << 3) | (flags & 0x7));
 
 	if (flags == 0x1) {
@@ -1518,7 +1500,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags,
 	/*
 	 * GP op header, lengths are expected in bits.
 	 */
-	vq_cmd_w0.u64 = 0;
 	vq_cmd_w0.s.param1 = encr_data_len;
 	vq_cmd_w0.s.param2 = auth_data_len;
 
@@ -1551,8 +1532,6 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags,
 
 		vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
 
-		vq_cmd_w0.s.opcode = opcode.flags;
-
 		if (likely(iv_len)) {
 			uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr
 						      + OFF_CTRL_LEN);
@@ -1575,9 +1554,7 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags,
 		m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len;
 		m_dma += OFF_CTRL_LEN + iv_len;
 
-		opcode.s.major |= CPT_DMA_MODE;
-
-		vq_cmd_w0.s.opcode = opcode.flags;
+		vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE;
 
 		/* DPTR has SG list */
 		in_buffer = m_vaddr;
@@ -1729,7 +1706,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags,
 	uint64_t *offset_vaddr, offset_dma;
 	uint32_t *iv_s, iv[4], j;
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 
 	buf_p = &params->meta_buf;
 	m_vaddr = buf_p->vaddr;
@@ -1768,11 +1744,12 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags,
 	m_vaddr = (uint8_t *)m_vaddr + size;
 	m_dma += size;
 
-	opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G;
+	vq_cmd_w0.u64 = 0;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ZUC_SNOW3G;
 
 	/* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
 
-	opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
+	vq_cmd_w0.s.opcode.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
 			  (0 << 3) | (flags & 0x7));
 
 	/* consider iv len */
@@ -1801,7 +1778,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags,
 	/*
 	 * GP op header, lengths are expected in bits.
 	 */
-	vq_cmd_w0.u64 = 0;
 	vq_cmd_w0.s.param1 = encr_data_len;
 
 	/*
@@ -1833,8 +1809,6 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags,
 
 		vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
 
-		vq_cmd_w0.s.opcode = opcode.flags;
-
 		if (likely(iv_len)) {
 			uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr
 						      + OFF_CTRL_LEN);
@@ -1858,9 +1832,7 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags,
 		m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len;
 		m_dma += OFF_CTRL_LEN + iv_len;
 
-		opcode.s.major |= CPT_DMA_MODE;
-
-		vq_cmd_w0.s.opcode = opcode.flags;
+		vq_cmd_w0.s.opcode.major |= CPT_DMA_MODE;
 
 		/* DPTR has SG list */
 		in_buffer = m_vaddr;
@@ -1987,7 +1959,6 @@ cpt_kasumi_enc_prep(uint32_t req_flags,
 	uint64_t m_dma, c_dma;
 	uint64_t *offset_vaddr, offset_dma;
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 	uint8_t *in_buffer;
 	uint32_t g_size_bytes, s_size_bytes;
 	uint64_t dptr_dma, rptr_dma;
@@ -2037,19 +2008,17 @@ cpt_kasumi_enc_prep(uint32_t req_flags,
 	m_vaddr = (uint8_t *)m_vaddr + size;
 	m_dma += size;
 
-	opcode.s.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE;
 
 	/* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */
-	opcode.s.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) |
+	vq_cmd_w0.s.opcode.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) |
 			  (dir << 4) | (0 << 3) | (flags & 0x7));
 
 	/*
 	 * GP op header, lengths are expected in bits.
 	 */
-	vq_cmd_w0.u64 = 0;
 	vq_cmd_w0.s.param1 = encr_data_len;
 	vq_cmd_w0.s.param2 = auth_data_len;
-	vq_cmd_w0.s.opcode = opcode.flags;
 
 	/* consider iv len */
 	if (flags == 0x0) {
@@ -2223,7 +2192,6 @@ cpt_kasumi_dec_prep(uint64_t d_offs,
 	uint64_t m_dma, c_dma;
 	uint64_t *offset_vaddr, offset_dma;
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 	uint8_t *in_buffer;
 	uint32_t g_size_bytes, s_size_bytes;
 	uint64_t dptr_dma, rptr_dma;
@@ -2262,18 +2230,17 @@ cpt_kasumi_dec_prep(uint64_t d_offs,
 	m_vaddr = (uint8_t *)m_vaddr + size;
 	m_dma += size;
 
-	opcode.s.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE;
+	vq_cmd_w0.u64 = 0;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE;
 
 	/* indicates ECB/CBC, direction, ctx from cptr, iv from dptr */
-	opcode.s.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) |
+	vq_cmd_w0.s.opcode.minor = ((1 << 6) | (cpt_ctx->k_ecb << 5) |
 			  (dir << 4) | (0 << 3) | (flags & 0x7));
 
 	/*
 	 * GP op header, lengths are expected in bits.
 	 */
-	vq_cmd_w0.u64 = 0;
 	vq_cmd_w0.s.param1 = encr_data_len;
-	vq_cmd_w0.s.opcode = opcode.flags;
 
 	/* consider iv len */
 	encr_offset += iv_len;
diff --git a/drivers/common/cpt/cpt_ucode_asym.h b/drivers/common/cpt/cpt_ucode_asym.h
index 5d1c7b5f02..286f155849 100644
--- a/drivers/common/cpt/cpt_ucode_asym.h
+++ b/drivers/common/cpt/cpt_ucode_asym.h
@@ -234,7 +234,6 @@ cpt_modex_prep(struct asym_op_params *modex_params,
 	struct rte_crypto_op **op;
 	vq_cmd_word0_t vq_cmd_w0;
 	uint64_t total_key_len;
-	opcode_info_t opcode;
 	uint32_t dlen, rlen;
 	uint32_t base_len;
 	buf_ptr_t caddr;
@@ -265,9 +264,8 @@ cpt_modex_prep(struct asym_op_params *modex_params,
 	rlen = mod_len;
 
 	/* Setup opcodes */
-	opcode.s.major = CPT_MAJOR_OP_MODEX;
-	opcode.s.minor = CPT_MINOR_OP_MODEX;
-	vq_cmd_w0.s.opcode = opcode.flags;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_MODEX;
+	vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_MODEX;
 
 	/* GP op header */
 	vq_cmd_w0.s.param1 = mod_len;
@@ -307,7 +305,6 @@ cpt_rsa_prep(struct asym_op_params *rsa_params,
 	struct rte_crypto_op **op;
 	vq_cmd_word0_t vq_cmd_w0;
 	uint64_t total_key_len;
-	opcode_info_t opcode;
 	uint32_t dlen, rlen;
 	uint32_t in_size;
 	buf_ptr_t caddr;
@@ -334,16 +331,16 @@ cpt_rsa_prep(struct asym_op_params *rsa_params,
 
 	if (rsa_op.pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 		/* Use mod_exp operation for no_padding type */
-		opcode.s.minor = CPT_MINOR_OP_MODEX;
+		vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_MODEX;
 		vq_cmd_w0.s.param2 = exp_len;
 	} else {
 		if (rsa_op.op_type == RTE_CRYPTO_ASYM_OP_ENCRYPT) {
-			opcode.s.minor = CPT_MINOR_OP_PKCS_ENC;
+			vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_PKCS_ENC;
 			/* Public key encrypt, use BT2*/
 			vq_cmd_w0.s.param2 = CPT_BLOCK_TYPE2 |
 					((uint16_t)(exp_len) << 1);
 		} else if (rsa_op.op_type == RTE_CRYPTO_ASYM_OP_VERIFY) {
-			opcode.s.minor = CPT_MINOR_OP_PKCS_DEC;
+			vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_PKCS_DEC;
 			/* Public key decrypt, use BT1 */
 			vq_cmd_w0.s.param2 = CPT_BLOCK_TYPE1;
 			/* + 2 for decrypted len */
@@ -351,9 +348,7 @@ cpt_rsa_prep(struct asym_op_params *rsa_params,
 		}
 	}
 
-	/* Setup opcodes */
-	opcode.s.major = CPT_MAJOR_OP_MODEX;
-	vq_cmd_w0.s.opcode = opcode.flags;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_MODEX;
 
 	/* GP op header */
 	vq_cmd_w0.s.param1 = mod_len;
@@ -395,7 +390,6 @@ cpt_rsa_crt_prep(struct asym_op_params *rsa_params,
 	struct rte_crypto_op **op;
 	vq_cmd_word0_t vq_cmd_w0;
 	uint64_t total_key_len;
-	opcode_info_t opcode;
 	uint32_t dlen, rlen;
 	uint32_t in_size;
 	buf_ptr_t caddr;
@@ -422,14 +416,14 @@ cpt_rsa_crt_prep(struct asym_op_params *rsa_params,
 
 	if (rsa_op.pad == RTE_CRYPTO_RSA_PADDING_NONE) {
 		/*Use mod_exp operation for no_padding type */
-		opcode.s.minor = CPT_MINOR_OP_MODEX_CRT;
+		vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_MODEX_CRT;
 	} else {
 		if (rsa_op.op_type == RTE_CRYPTO_ASYM_OP_SIGN) {
-			opcode.s.minor = CPT_MINOR_OP_PKCS_ENC_CRT;
+			vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_PKCS_ENC_CRT;
 			/* Private encrypt, use BT1 */
 			vq_cmd_w0.s.param2 = CPT_BLOCK_TYPE1;
 		} else if (rsa_op.op_type == RTE_CRYPTO_ASYM_OP_DECRYPT) {
-			opcode.s.minor = CPT_MINOR_OP_PKCS_DEC_CRT;
+			vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_PKCS_DEC_CRT;
 			/* Private decrypt, use BT2 */
 			vq_cmd_w0.s.param2 = CPT_BLOCK_TYPE2;
 			/* + 2 for decrypted len */
@@ -437,9 +431,7 @@ cpt_rsa_crt_prep(struct asym_op_params *rsa_params,
 		}
 	}
 
-	/* Setup opcodes */
-	opcode.s.major = CPT_MAJOR_OP_MODEX;
-	vq_cmd_w0.s.opcode = opcode.flags;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_MODEX;
 
 	/* GP op header */
 	vq_cmd_w0.s.param1 = mod_len;
@@ -621,7 +613,6 @@ cpt_ecdsa_sign_prep(struct rte_crypto_ecdsa_op_param *ecdsa,
 	uint16_t order_len, prime_len;
 	uint16_t o_offset, pk_offset;
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 	uint16_t rlen, dlen;
 	buf_ptr_t caddr;
 	uint8_t *dptr;
@@ -676,9 +667,8 @@ cpt_ecdsa_sign_prep(struct rte_crypto_ecdsa_op_param *ecdsa,
 	rlen = 2 * p_align;
 
 	/* Setup opcodes */
-	opcode.s.major = CPT_MAJOR_OP_ECDSA;
-	opcode.s.minor = CPT_MINOR_OP_ECDSA_SIGN;
-	vq_cmd_w0.s.opcode = opcode.flags;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ECDSA;
+	vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_ECDSA_SIGN;
 
 	/* GP op header */
 	vq_cmd_w0.s.param1 = curveid | (message_len << 8);
@@ -722,7 +712,6 @@ cpt_ecdsa_verify_prep(struct rte_crypto_ecdsa_op_param *ecdsa,
 	uint16_t qx_offset, qy_offset;
 	uint16_t p_align, m_align;
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 	buf_ptr_t caddr;
 	uint16_t dlen;
 	uint8_t *dptr;
@@ -783,9 +772,8 @@ cpt_ecdsa_verify_prep(struct rte_crypto_ecdsa_op_param *ecdsa,
 	dptr += p_align;
 
 	/* Setup opcodes */
-	opcode.s.major = CPT_MAJOR_OP_ECDSA;
-	opcode.s.minor = CPT_MINOR_OP_ECDSA_VERIFY;
-	vq_cmd_w0.s.opcode = opcode.flags;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ECDSA;
+	vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_ECDSA_VERIFY;
 
 	/* GP op header */
 	vq_cmd_w0.s.param1 = curveid | (message_len << 8);
@@ -845,7 +833,6 @@ cpt_ecpm_prep(struct rte_crypto_ecpm_op_param *ecpm,
 	uint16_t dlen, rlen, prime_len;
 	uint16_t x1_offset, y1_offset;
 	vq_cmd_word0_t vq_cmd_w0;
-	opcode_info_t opcode;
 	buf_ptr_t caddr;
 	uint8_t *dptr;
 
@@ -880,11 +867,10 @@ cpt_ecpm_prep(struct rte_crypto_ecpm_op_param *ecpm,
 	dptr += p_align;
 
 	/* Setup opcodes */
-	opcode.s.major = CPT_MAJOR_OP_ECC;
-	opcode.s.minor = CPT_MINOR_OP_ECC_UMP;
+	vq_cmd_w0.s.opcode.major = CPT_MAJOR_OP_ECC;
+	vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_ECC_UMP;
 
 	/* GP op header */
-	vq_cmd_w0.s.opcode = opcode.flags;
 	vq_cmd_w0.s.param1 = curveid;
 	vq_cmd_w0.s.param2 = ecpm->scalar.length;
 	vq_cmd_w0.s.dlen = dlen;
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index c7feb6f9e2..46daf73725 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -889,7 +889,7 @@ otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp)
 	mdata_len = (int)rsp[3];
 	rte_pktmbuf_trim(m, mdata_len);
 
-	if ((word0->s.opcode & 0xff) == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
+	if (word0->s.opcode.major == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) {
 		data = rte_pktmbuf_mtod(m, char *);
 
 		if (rsp[4] == RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
