From patchwork Tue Dec 15 07:31:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Li Zhang X-Patchwork-Id: 85187 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F147AA09E9; Tue, 15 Dec 2020 08:31:50 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5E897C9B0; Tue, 15 Dec 2020 08:31:37 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id C1ED4C9AE for ; Tue, 15 Dec 2020 08:31:35 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from lizh@nvidia.com) with SMTP; 15 Dec 2020 09:31:31 +0200 Received: from nvidia.com (c-236-2-240-245.mtl.labs.mlnx [10.236.2.245]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BF7VOkD005436; Tue, 15 Dec 2020 09:31:31 +0200 From: Li Zhang To: dekelp@nvidia.com, orika@nvidia.com, viacheslavo@nvidia.com, matan@nvidia.com Cc: dev@dpdk.org, thomas@monjalon.net, rasland@nvidia.com Date: Tue, 15 Dec 2020 09:31:12 +0200 Message-Id: <20201215073119.404947-2-lizh@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201215073119.404947-1-lizh@nvidia.com> References: <20201215073119.404947-1-lizh@nvidia.com> MIME-Version: 1.0 Subject: [dpdk-dev] [RFC 1/8] net/mlx5: use mask for meter register setting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" ASO meter feature may require to locate the flow context tag action after the ASO action. The register used for the meter tag is also used for the meter color: Bits[0-7] A meter color value set by the HW. Bits[8-31] A flow meter context set by SW. Currently the tag action for meter writes all the bits of the meter register, so it will potentially overwrite meter color when ASO meter action is before the tag action. Set only 24-MSB-bits of meter register in the meter tag action. Signed-off-by: Li Zhang --- drivers/net/mlx5/mlx5_flow.c | 22 ++++++++++++++++------ drivers/net/mlx5/mlx5_flow.h | 2 ++ drivers/net/mlx5/mlx5_flow_dv.c | 2 ++ 3 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 6ea9d87d18..1cfa817ae9 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -4161,9 +4161,11 @@ flow_hairpin_split(struct rte_eth_dev *dev, rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); actions_rx++; set_tag = (void *)actions_rx; - set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL); + *set_tag = (struct mlx5_rte_flow_action_set_tag) { + .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), + .data = flow_id, + }; MLX5_ASSERT(set_tag->id > REG_NON); - set_tag->data = flow_id; tag_action->conf = set_tag; /* Create Tx item list. */ rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); @@ -4296,6 +4298,7 @@ flow_meter_split_prep(struct rte_eth_dev *dev, struct mlx5_rte_flow_item_tag *tag_spec; struct mlx5_rte_flow_item_tag *tag_mask; uint32_t tag_id = 0; + uint32_t reg_id = 0; bool copy_vlan = false; /* Prepare the actions for prefix and suffix flow. */ @@ -4343,7 +4346,7 @@ flow_meter_split_prep(struct rte_eth_dev *dev, actions_pre++; /* Set the tag. */ set_tag = (void *)actions_pre; - set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); + reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error); mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) { @@ -4355,7 +4358,12 @@ flow_meter_split_prep(struct rte_eth_dev *dev, } else if (!tag_id) { return 0; } - set_tag->data = tag_id << MLX5_MTR_COLOR_BITS; + *set_tag = (struct mlx5_rte_flow_action_set_tag) { + .id = reg_id, + .offset = MLX5_MTR_COLOR_BITS, + .length = sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS, + .data = tag_id, + }; assert(tag_action); tag_action->conf = set_tag; /* Prepare the suffix subflow items. */ @@ -4773,10 +4781,12 @@ flow_sample_split_prep(struct rte_eth_dev *dev, ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); if (ret < 0) return ret; - set_tag->id = ret; mlx5_ipool_malloc(priv->sh->ipool [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); - set_tag->data = tag_id; + *set_tag = (struct mlx5_rte_flow_action_set_tag) { + .id = ret, + .data = tag_id, + }; /* Prepare the suffix subflow items. */ tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); tag_spec->data = tag_id; diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 66e19b627b..6bb7bae1bf 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -55,6 +55,8 @@ struct mlx5_rte_flow_item_tag { /* Modify selected register. */ struct mlx5_rte_flow_action_set_tag { enum modify_reg id; + uint8_t offset; + uint8_t length; uint32_t data; }; diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 4e5ca4f6c9..7905923665 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1015,6 +1015,8 @@ flow_dv_convert_action_set_reg actions[i] = (struct mlx5_modification_cmd) { .action_type = MLX5_MODIFICATION_TYPE_SET, .field = reg_to_field[conf->id], + .offset = conf->offset, + .length = conf->length, }; actions[i].data0 = rte_cpu_to_be_32(actions[i].data0); actions[i].data1 = rte_cpu_to_be_32(conf->data);