[v1,1/4] net/mlx4: fix rebuild bug for Memory Region cache
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Commit Message
'dev_gen' is a variable to inform other cores to flush their local cache
when global cache is rebuilt.
However, if 'dev_gen' is updated after global cache is rebuilt, other
cores may load a wrong memory region lkey value from old local cache.
Timeslot main core worker core
1 rebuild global cache
2 load unchanged dev_gen
3 update dev_gen
4 look up old local cache
From the example above, we can see that though global cache is rebuilt,
due to that dev_gen is not updated, the worker core may look up old
cache table and receive a wrong memory region lkey value.
To fix this, updating 'dev_gen' should be moved before rebuilding global
cache to inform worker cores to flush their local cache when global
cache start rebuilding. And wmb can ensure the sequence of this process.
Fixes: 9797bfcce1c9 ("net/mlx4: add new memory region support")
Cc: stable@dpdk.org
Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
drivers/net/mlx4/mlx4_mr.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
@@ -946,20 +946,17 @@ mlx4_mr_mem_event_free_cb(struct rte_eth_dev *dev, const void *addr, size_t len)
rebuild = 1;
}
if (rebuild) {
- mr_rebuild_dev_cache(dev);
- /*
- * Flush local caches by propagating invalidation across cores.
- * rte_smp_wmb() is enough to synchronize this event. If one of
- * freed memsegs is seen by other core, that means the memseg
- * has been allocated by allocator, which will come after this
- * free call. Therefore, this store instruction (incrementing
- * generation below) will be guaranteed to be seen by other core
- * before the core sees the newly allocated memory.
- */
++priv->mr.dev_gen;
DEBUG("broadcasting local cache flush, gen=%d",
- priv->mr.dev_gen);
+ priv->mr.dev_gen);
+
+ /* Flush local caches by propagating invalidation across cores.
+ * rte_smp_wmb is to keep the order that dev_gen updated before
+ * rebuilding global cache. Therefore, other core can flush their
+ * local cache on time.
+ */
rte_smp_wmb();
+ mr_rebuild_dev_cache(dev);
}
rte_rwlock_write_unlock(&priv->mr.rwlock);
#ifdef RTE_LIBRTE_MLX4_DEBUG