From patchwork Thu Apr 8 09:50:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 90869 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 47940A0579; Thu, 8 Apr 2021 11:51:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7D3691410BF; Thu, 8 Apr 2021 11:51:28 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 027D31410B9 for ; Thu, 8 Apr 2021 11:51:27 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 1389pJ4I020776 for ; Thu, 8 Apr 2021 02:51:27 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=9z9awlTkX7mV62t3OZnm8/UldOgQxqaEUSwDUvz/BpE=; b=IuvWowmo75htSYqItH4aQlw9xdjA/XP/74WShgzlVH+psJm/neUOkRNiyK+9AeU4/sxZ iEf3cOOYkmNumkCJpAfGULPxZWScFal00tRNo22Q6XvqJV05yiQ6Pyhlep9TEVQjNE0R GGXm97iQmKpyIFMWt6T4TEeS2LXyO/UpuilrCWXqVsXK0hJaC3eetITbK0Cqi4F2gwiG YdJCmWt8wYl4wIr1pt+A36JIaJCeLHjqm8DFz+IpzDJtRzxRDUhB3T6ekwcKAsjQLfEp 5q4jlt8e1gzObOg7cmuObjKhwfHUZR0UGYGrW7ev9lu1VGRJW8OYFMGwCRtw/TDEdFg0 dg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 37swewgfad-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 08 Apr 2021 02:51:27 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 8 Apr 2021 02:51:25 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 8 Apr 2021 02:51:25 -0700 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id F1B273F7045; Thu, 8 Apr 2021 02:51:22 -0700 (PDT) From: Ashwin Sekhar T K To: CC: , , , , , , Date: Thu, 8 Apr 2021 15:20:47 +0530 Message-ID: <20210408095049.3100322-10-asekhar@marvell.com> X-Mailer: git-send-email 2.31.0 In-Reply-To: <20210408095049.3100322-1-asekhar@marvell.com> References: <20210305162149.2196166-1-asekhar@marvell.com> <20210408095049.3100322-1-asekhar@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: MLcQCR9xhWFpLE8lMBfKWmZk_go5u3ST X-Proofpoint-GUID: MLcQCR9xhWFpLE8lMBfKWmZk_go5u3ST X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-08_02:2021-04-08, 2021-04-08 signatures=0 Subject: [dpdk-dev] [PATCH v4 09/11] mempool/cnxk: add cn10k batch enqueue op X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the implementation for Marvell CN10k mempool batch enqueue op. Signed-off-by: Ashwin Sekhar T K --- drivers/mempool/cnxk/cn10k_mempool_ops.c | 28 +++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c index a3aef0ddb2..c225c227df 100644 --- a/drivers/mempool/cnxk/cn10k_mempool_ops.c +++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c @@ -131,6 +131,32 @@ batch_op_fini(struct rte_mempool *mp) rte_wmb(); } +static int __rte_hot +cn10k_mempool_enq(struct rte_mempool *mp, void *const *obj_table, + unsigned int n) +{ + const uint64_t *ptr = (const uint64_t *)obj_table; + uint64_t lmt_addr = 0, lmt_id = 0; + struct batch_op_data *op_data; + + /* Ensure mbuf init changes are written before the free pointers are + * enqueued to the stack. + */ + rte_io_wmb(); + + if (n == 1) { + roc_npa_aura_op_free(mp->pool_id, 1, ptr[0]); + return 0; + } + + op_data = batch_op_data_get(mp->pool_id); + lmt_addr = op_data->lmt_addr; + ROC_LMT_BASE_ID_GET(lmt_addr, lmt_id); + roc_npa_aura_op_batch_free(mp->pool_id, ptr, n, 1, lmt_addr, lmt_id); + + return 0; +} + static int cn10k_mempool_alloc(struct rte_mempool *mp) { @@ -187,7 +213,7 @@ static struct rte_mempool_ops cn10k_mempool_ops = { .name = "cn10k_mempool_ops", .alloc = cn10k_mempool_alloc, .free = cn10k_mempool_free, - .enqueue = cnxk_mempool_enq, + .enqueue = cn10k_mempool_enq, .dequeue = cnxk_mempool_deq, .get_count = cnxk_mempool_get_count, .calc_mem_size = cnxk_mempool_calc_mem_size,