diff mbox series

net/octeontx2: configure MTU value correctly

Message ID 20210810072100.4233-1-hpothula@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series net/octeontx2: configure MTU value correctly |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot-build success github build: passed
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS

Commit Message

Hanumanth Pothula Aug. 10, 2021, 7:21 a.m. UTC 
  Update MTU value based on PTP enable status and reserve eight
bytes in TX path to accommodate VLAN tags.

If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208.

Signed-off-by: Hanumanth Reddy Pothula <hpothula@marvell.com>
---
 drivers/net/octeontx2/otx2_ethdev_ops.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Jerin Jacob Sept. 7, 2021, 8:25 a.m. UTC | #1 
On Tue, Aug 10, 2021 at 12:52 PM Hanumanth Reddy Pothula
<hpothula@marvell.com> wrote:
>
> Update MTU value based on PTP enable status and reserve eight
> bytes in TX path to accommodate VLAN tags.
>
> If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208.
>
> Signed-off-by: Hanumanth Reddy Pothula <hpothula@marvell.com>


Updated as

[for-next-net]dell[dpdk-next-net-mrvl] $ git show
commit b6b92bb4bf28c39e55a538741cf408041a28f412 (HEAD -> for-next-net)
Author: Hanumanth Reddy Pothula <hpothula@marvell.com>
Date:   Tue Aug 10 12:51:00 2021 +0530

    net/octeontx2: fix MTU value

    Update MTU value based on PTP enable status and reserve eight
    bytes in TX path to accommodate VLAN tags.

    If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208.

    Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
    Cc: stable@dpdk.org

    Signed-off-by: Hanumanth Reddy Pothula <hpothula@marvell.com>
    Acked-by: Jerin Jacob <jerinj@marvell.com>


Applied to dpdk-next-net-mrvl/for-next-net. Thanks





> ---
>  drivers/net/octeontx2/otx2_ethdev_ops.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
> index 5a4501208e..552e6bd43d 100644
> --- a/drivers/net/octeontx2/otx2_ethdev_ops.c
> +++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
> @@ -17,7 +17,8 @@ otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
>         struct nix_frs_cfg *req;
>         int rc;
>
> -       frame_size += NIX_TIMESYNC_RX_OFFSET * otx2_ethdev_is_ptp_en(dev);
> +       if (dev->configured && otx2_ethdev_is_ptp_en(dev))
> +               frame_size += NIX_TIMESYNC_RX_OFFSET;
>
>         /* Check if MTU is within the allowed range */
>         if (frame_size < NIX_MIN_FRS || frame_size > NIX_MAX_FRS)
> @@ -547,6 +548,11 @@ otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
>         devinfo->max_vfs = pci_dev->max_vfs;
>         devinfo->max_mtu = devinfo->max_rx_pktlen - NIX_L2_OVERHEAD;
>         devinfo->min_mtu = devinfo->min_rx_bufsize - NIX_L2_OVERHEAD;
> +       if (dev->configured && otx2_ethdev_is_ptp_en(dev)) {
> +               devinfo->max_mtu -=  NIX_TIMESYNC_RX_OFFSET;
> +               devinfo->min_mtu -=  NIX_TIMESYNC_RX_OFFSET;
> +               devinfo->max_rx_pktlen -= NIX_TIMESYNC_RX_OFFSET;
> +       }
>
>         devinfo->rx_offload_capa = dev->rx_offload_capa;
>         devinfo->tx_offload_capa = dev->tx_offload_capa;
> --
> 2.25.1
>
diff mbox series

Patch

diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 5a4501208e..552e6bd43d 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -17,7 +17,8 @@  otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 	struct nix_frs_cfg *req;
 	int rc;
 
-	frame_size += NIX_TIMESYNC_RX_OFFSET * otx2_ethdev_is_ptp_en(dev);
+	if (dev->configured && otx2_ethdev_is_ptp_en(dev))
+		frame_size += NIX_TIMESYNC_RX_OFFSET;
 
 	/* Check if MTU is within the allowed range */
 	if (frame_size < NIX_MIN_FRS || frame_size > NIX_MAX_FRS)
@@ -547,6 +548,11 @@  otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *devinfo)
 	devinfo->max_vfs = pci_dev->max_vfs;
 	devinfo->max_mtu = devinfo->max_rx_pktlen - NIX_L2_OVERHEAD;
 	devinfo->min_mtu = devinfo->min_rx_bufsize - NIX_L2_OVERHEAD;
+	if (dev->configured && otx2_ethdev_is_ptp_en(dev)) {
+		devinfo->max_mtu -=  NIX_TIMESYNC_RX_OFFSET;
+		devinfo->min_mtu -=  NIX_TIMESYNC_RX_OFFSET;
+		devinfo->max_rx_pktlen -= NIX_TIMESYNC_RX_OFFSET;
+	}
 
 	devinfo->rx_offload_capa = dev->rx_offload_capa;
 	devinfo->tx_offload_capa = dev->tx_offload_capa;