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[0/2] Add logic to IAVF to count continuous DD bits for Arm

Message ID 20220205002630.31841-1-kathleen.capella@arm.com (mailing list archive)
Headers

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Kathleen Capella Feb. 5, 2022, 12:26 a.m. UTC
  This patchset introduces a fix for Arm platforms to the IAVF driver that was 
added to the i40e driver in a previous patchset [1]. 

The driver determines which descriptors in the HW ring reference packets
that are ready to be received by counting those descriptors whose DD bit is set
to 1. On Arm, the reading of descriptors can be reordered. The CPU may be
reading descriptors as the NIC is updating them. Tt is possbile that the DD bit 
for a descriptor earlier in the queue is read as not set while the DD bit for a
descriptor later in the queue is read as set. This patchset ensures only
contiguous DD bits set to 1 are counted.

The first patch in this series adds this logic to the bulk Rx path.
The second patch adds this same logic to the function which reads flexible Rx
descriptors.

No performance drop was observed when running l3fwd on N1SDP with a single core.

[1]
https://patches.dpdk.org/project/dpdk/patch/20210706065404.25137-2-joyce.kong@arm.com/

Kathleen Capella (2):
  net/iavf: count continuous DD bits for Arm
  net/iavf: count continuous DD bits for Arm in flex Rx

 drivers/net/iavf/iavf_rxtx.c | 52 ++++++++++++++++++++++++++++++------
 1 file changed, 44 insertions(+), 8 deletions(-)