diff mbox series

net/iavf: replace SMP barrier with thread fence

Message ID 20220307192644.31721-1-kathleen.capella@arm.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series net/iavf: replace SMP barrier with thread fence |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS

Commit Message

Kathleen Capella March 7, 2022, 7:26 p.m. UTC 
  Replace the SMP barrier with atomic thread fence for iavf hw ring scan
in the bulk Rx path.

This patch introduces a change to the iavf driver that was already added
to the i40e driver [1] as part of the adoption of the use of compiler
atomics.

[1] https://patches.dpdk.org/project/dpdk/patch/20210706065404.25137-3-
joyce.kong@arm.com/

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Reviewed-by: Joyce Kong <joyce.kong@arm.com>
---
 drivers/net/iavf/iavf_rxtx.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Qi Zhang March 13, 2022, 12:15 p.m. UTC | #1 
> -----Original Message-----
> From: Kathleen Capella <kathleen.capella@arm.com>
> Sent: Tuesday, March 8, 2022 3:27 AM
> To: Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; nd@arm.com; honnappa.nagarahalli@arm.com;
> joyce.kong@arm.com; Kathleen Capella <kathleen.capella@arm.com>
> Subject: [PATCH] net/iavf: replace SMP barrier with thread fence
> 
> Replace the SMP barrier with atomic thread fence for iavf hw ring scan in the
> bulk Rx path.
> 
> This patch introduces a change to the iavf driver that was already added to the
> i40e driver [1] as part of the adoption of the use of compiler atomics.
> 

> [1] https://patches.dpdk.org/project/dpdk/patch/20210706065404.25137-3-
> joyce.kong@arm.com/

Better replace URL with below commit line
Commit 8649e2356689 ("net/i40e: replace SMP barrier with thread fence in Rx")

Btw, the patch will be deferred to the next release as it's not a critical fix.
Qi Zhang March 24, 2022, 8:49 a.m. UTC | #2 
> -----Original Message-----
> From: Kathleen Capella <kathleen.capella@arm.com>
> Sent: Tuesday, March 8, 2022 3:27 AM
> To: Wu, Jingjing <jingjing.wu@intel.com>; Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; nd@arm.com; honnappa.nagarahalli@arm.com;
> joyce.kong@arm.com; Kathleen Capella <kathleen.capella@arm.com>
> Subject: [PATCH] net/iavf: replace SMP barrier with thread fence
> 
> Replace the SMP barrier with atomic thread fence for iavf hw ring scan in the
> bulk Rx path.
> 
> This patch introduces a change to the iavf driver that was already added to
> the i40e driver [1] as part of the adoption of the use of compiler atomics.
> 
> [1] https://patches.dpdk.org/project/dpdk/patch/20210706065404.25137-3-
> joyce.kong@arm.com/

Replaced with 
[1] Commit 8649e2356689 ("net/i40e: replace SMP barrier with thread fence in Rx")
> 
> Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
> Reviewed-by: Joyce Kong <joyce.kong@arm.com>

Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index cb779879cb..47f12a9b28 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -1843,7 +1843,8 @@  iavf_rx_scan_hw_ring_flex_rxd(struct iavf_rx_queue *rxq)
 		for (j = IAVF_LOOK_AHEAD - 1; j >= 0; j--)
 			s[j] = rte_le_to_cpu_16(rxdp[j].wb.status_error0);
 
-		rte_smp_rmb();
+		/* This barrier is to order loads of different words in the descriptor */
+		rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
 
 		/* Compute how many contiguous DD bits were set */
 		for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {
@@ -1946,7 +1947,8 @@  iavf_rx_scan_hw_ring(struct iavf_rx_queue *rxq)
 			       IAVF_RXD_QW1_STATUS_SHIFT;
 		}
 
-		rte_smp_rmb();
+		/* This barrier is to order loads of different words in the descriptor */
+		rte_atomic_thread_fence(__ATOMIC_ACQUIRE);
 
 		/* Compute how many contiguous DD bits were set */
 		for (j = 0, nb_dd = 0; j < IAVF_LOOK_AHEAD; j++) {