From patchwork Fri Apr 8 08:45:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenjun Wu X-Patchwork-Id: 109499 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B77DEA0501; Fri, 8 Apr 2022 11:07:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 870A142803; Fri, 8 Apr 2022 11:06:47 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id BE66F4067E for ; Fri, 8 Apr 2022 11:06:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649408804; x=1680944804; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=k1bYfBz5bntoj1AF99dF+PPH3/APC0HMBy0kCxdLU7c=; b=ShrdZZaiHdLp2oX8ue7hc3Un1r5wmMRs8WUR78qvdOyv6Cq2vDpVUxhI /FWY1gdM4nn4fFLSRlAHUFzLXTjDD4M83PDnReC8z2otu0sxvhLG5ZDvc aaHvGugN2z2mAlsp7ZsL++AB/OS0skL0tOFB3MiodBLrxOzpvTZJfQT2l SUkZDwNXcF3mEaIIXcdnAZu5uac+OOqynGY73GxsWkfJ5zCJh25sKqyF6 zVxBKLK64PP8KEdzNmZfLaCvQ2s2TwutdgZapHfCYTNFXPRB/wO14uCTt T0WOQb69BGJAj/7GO9K1Zdpw+c+gctzN/vxOQWUkaR9kocvOlRZttK53b A==; X-IronPort-AV: E=McAfee;i="6400,9594,10310"; a="261726113" X-IronPort-AV: E=Sophos;i="5.90,244,1643702400"; d="scan'208";a="261726113" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Apr 2022 02:06:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,244,1643702400"; d="scan'208";a="659417873" Received: from npg-wuwenjun-dpdk-01.sh.intel.com ([10.67.110.181]) by orsmga004.jf.intel.com with ESMTP; 08 Apr 2022 02:06:39 -0700 From: Wenjun Wu To: dev@dpdk.org, qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com Subject: [PATCH v4 3/4] net/iavf: support quanta size configuration Date: Fri, 8 Apr 2022 16:45:36 +0800 Message-Id: <20220408084537.920685-4-wenjun1.wu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220408084537.920685-1-wenjun1.wu@intel.com> References: <20220329020717.1101263-1-wenjun1.wu@intel.com> <20220408084537.920685-1-wenjun1.wu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds quanta size configuration support. Quanta size should between 256 and 4096, and be a product of 64. Signed-off-by: Wenjun Wu --- drivers/net/iavf/iavf.h | 3 +++ drivers/net/iavf/iavf_ethdev.c | 38 ++++++++++++++++++++++++++++++++++ drivers/net/iavf/iavf_vchnl.c | 31 +++++++++++++++++++++++++++ 3 files changed, 72 insertions(+) diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h index 96515a3ee9..c0a4a47b04 100644 --- a/drivers/net/iavf/iavf.h +++ b/drivers/net/iavf/iavf.h @@ -292,6 +292,7 @@ enum iavf_proto_xtr_type { struct iavf_devargs { uint8_t proto_xtr_dflt; uint8_t proto_xtr[IAVF_MAX_QUEUE_NUM]; + uint16_t quanta_size; }; struct iavf_security_ctx; @@ -467,6 +468,8 @@ int iavf_set_q_bw(struct rte_eth_dev *dev, int iavf_set_q_tc_map(struct rte_eth_dev *dev, struct virtchnl_queue_tc_mapping *q_tc_mapping, uint16_t size); +int iavf_set_vf_quanta_size(struct iavf_adapter *adapter, u16 start_queue_id, + u16 num_queues); void iavf_tm_conf_init(struct rte_eth_dev *dev); void iavf_tm_conf_uninit(struct rte_eth_dev *dev); int iavf_ipsec_crypto_request(struct iavf_adapter *adapter, diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index d6190ac24a..7d093bdc24 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -34,9 +34,11 @@ /* devargs */ #define IAVF_PROTO_XTR_ARG "proto_xtr" +#define IAVF_QUANTA_SIZE_ARG "quanta_size" static const char * const iavf_valid_args[] = { IAVF_PROTO_XTR_ARG, + IAVF_QUANTA_SIZE_ARG, NULL }; @@ -950,6 +952,9 @@ iavf_dev_start(struct rte_eth_dev *dev) return -1; } + if (iavf_set_vf_quanta_size(adapter, index, num_queue_pairs) != 0) + PMD_DRV_LOG(WARNING, "configure quanta size failed"); + /* If needed, send configure queues msg multiple times to make the * adminq buffer length smaller than the 4K limitation. */ @@ -2092,6 +2097,25 @@ iavf_handle_proto_xtr_arg(__rte_unused const char *key, const char *value, return 0; } +static int +parse_u16(__rte_unused const char *key, const char *value, void *args) +{ + u16 *num = (u16 *)args; + u16 tmp; + + errno = 0; + tmp = strtoull(value, NULL, 10); + if (errno || !tmp) { + PMD_DRV_LOG(WARNING, "%s: \"%s\" is not a valid u16", + key, value); + return -1; + } + + *num = tmp; + + return 0; +} + static int iavf_parse_devargs(struct rte_eth_dev *dev) { struct iavf_adapter *ad = @@ -2118,6 +2142,20 @@ static int iavf_parse_devargs(struct rte_eth_dev *dev) if (ret) goto bail; + ret = rte_kvargs_process(kvlist, IAVF_QUANTA_SIZE_ARG, + &parse_u16, &ad->devargs.quanta_size); + if (ret) + goto bail; + + if (ad->devargs.quanta_size == 0) + ad->devargs.quanta_size = 1024; + + if (ad->devargs.quanta_size < 256 || ad->devargs.quanta_size > 4096 || + ad->devargs.quanta_size & 0x40) { + PMD_INIT_LOG(ERR, "invalid quanta size\n"); + return -EINVAL; + } + bail: rte_kvargs_free(kvlist); return ret; diff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c index 537369f736..f9452d14ae 100644 --- a/drivers/net/iavf/iavf_vchnl.c +++ b/drivers/net/iavf/iavf_vchnl.c @@ -1828,3 +1828,34 @@ iavf_ipsec_crypto_request(struct iavf_adapter *adapter, return 0; } + +int +iavf_set_vf_quanta_size(struct iavf_adapter *adapter, u16 start_queue_id, u16 num_queues) +{ + struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); + struct iavf_cmd_info args; + struct virtchnl_quanta_cfg q_quanta; + int err; + + if (adapter->devargs.quanta_size == 0) + return 0; + + q_quanta.quanta_size = adapter->devargs.quanta_size; + q_quanta.queue_select.type = VIRTCHNL_QUEUE_TYPE_TX; + q_quanta.queue_select.start_queue_id = start_queue_id; + q_quanta.queue_select.num_queues = num_queues; + + args.ops = VIRTCHNL_OP_CONFIG_QUANTA; + args.in_args = (uint8_t *)&q_quanta; + args.in_args_size = sizeof(q_quanta); + args.out_buffer = vf->aq_resp; + args.out_size = IAVF_AQ_BUF_SZ; + + err = iavf_execute_vf_cmd(adapter, &args, 0); + if (err) { + PMD_DRV_LOG(ERR, "Failed to execute command VIRTCHNL_OP_CONFIG_QUANTA"); + return err; + } + + return 0; +}