[v3,1/2] config/arm: add SVE ACLE control flag

Message ID 20220509094615.2397452-1-rbhansali@marvell.com (mailing list archive)
State Superseded, archived
Headers
Series [v3,1/2] config/arm: add SVE ACLE control flag |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS

Commit Message

Rahul Bhansali May 9, 2022, 9:46 a.m. UTC
  This add the control flag for SVE ACLE to enable or disable
RTE_HAS_SVE_ACLE macro in the build.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
Changes in v3:
- Moved sve_acle condition to be consider for
RTE_HAS_SVE_ACLE flag only.

Changes in v2:
- Renamed the flag to sve_acle from sve
- Added double-indent.

 config/arm/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--
2.25.1
  

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 8aead74086..6f8961eac8 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -605,7 +605,7 @@  endif

 if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
     compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
-    if (cc.check_header('arm_sve.h'))
+    if (cc.check_header('arm_sve.h') and soc_config.get('sve_acle', true))
         dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)
     endif
 endif