From patchwork Fri May 20 03:05:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Vargas, Hernan" X-Patchwork-Id: 111464 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2D2D7A0503; Fri, 20 May 2022 05:45:58 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0DF7942B76; Fri, 20 May 2022 05:45:37 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 90867427EB for ; Fri, 20 May 2022 05:45:32 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653018332; x=1684554332; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OM1fIB23h8LFNKsmzc9sN5gwnThiOFGtbjA0tlgoX+I=; b=j+Q/2EFxISWWb7Z5y/CKGHZCYHcylLOKM+DgCWXzTt5F9yxKgadedQtH xBLMuLn5dyr5M7TLN/Rp7yZ2cwS9zer0l6r/H9TsL5SSThFruH+pKuXOl EKHIUDcEQmDpdlhqTv4jEeJQrDTaNMzGmFEQfQetrLUvvqW4UteItVb63 alYofcu8rLhmj7s4miUHtaP2DYT1ZfIFaTroEA1xHDnb1wVSNkb0YkwPI P7tGArWSojaUR3CxcKSuepI4GvOngvwrJu+KQ6aCC4gyrEfElE2mZEoDZ dU4p5aqRQFJnCrXn+uGU+1l589TH9KWJ2hD969xlDZDyVfshaZgcWco08 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10352"; a="272603057" X-IronPort-AV: E=Sophos;i="5.91,238,1647327600"; d="scan'208";a="272603057" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2022 20:43:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,238,1647327600"; d="scan'208";a="598980701" Received: from flexran-pae-icx01.an.intel.com (HELO pae-M50CYP2SBSTD.an.intel.com) ([10.123.100.83]) by orsmga008.jf.intel.com with ESMTP; 19 May 2022 20:43:48 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Subject: [PATCH v2 5/5] baseband/fpga_5gnr_fec: remove filler from HARQ Date: Thu, 19 May 2022 22:05:56 -0500 Message-Id: <20220520030556.3475133-6-hernan.vargas@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220520030556.3475133-1-hernan.vargas@intel.com> References: <20220520030556.3475133-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Hernan Removed filler bits from HARQ calculation on the N3000 FPGA since these are already taken out by the deratematching step. The change is only an optimization with no functional impact, no change required on stable branches. Signed-off-by: Hernan Reviewed-by: Nicolas Chautru --- drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index d678695a3c..82ae6ba678 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -1844,7 +1844,7 @@ enqueue_ldpc_dec_one_op_cb(struct fpga_queue *q, struct rte_bbdev_dec_op *op, else l = k0 + e + dec->n_filler; harq_out_length = RTE_MIN(RTE_MAX(harq_in_length, l), - dec->n_cb - dec->n_filler); + dec->n_cb); dec->harq_combined_output.length = harq_out_length; }