From patchwork Wed Jun 15 12:58:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Spike Du X-Patchwork-Id: 112770 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E996EA0548; Wed, 15 Jun 2022 15:09:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8819942B88; Wed, 15 Jun 2022 15:09:27 +0200 (CEST) Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2085.outbound.protection.outlook.com [40.107.237.85]) by mails.dpdk.org (Postfix) with ESMTP id 19DDE41148 for ; Wed, 15 Jun 2022 15:09:26 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ayIwMwY/wvEq6JwvaQYjTQdPn/U/LXgW4/95WwHZ5k2NDCFHr3+7C+XdyYPIQZ9je/LhYm5IN5qVrl5UpNnCjOerMX5NXku9UZAl1GpJSC8cEJUUwKatiLin8/OqQV8s38aqlNQugt6tqdnCTCMofi/2GN1I/l1EGux2Ca3utON0t9qaGPGUv5VGi6luKBeMHHFXBUfaAaGqLCzrlzKo+0aQn+HcVSbtAl4uzpRrcY08JduxJz9QqS0+h0aKDudYTBkQ0QcVfPn3piwBZeEMrLYsgPaOUWLBK9tbJ/OvtPXQo7USuJe8Eygt4Li3xBypBz4I+uP8jLcpDacrEWjP7A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=LhhaG+kqPle2OAEsawO1hUs7HhdBkskic3DLqbyClnk=; b=Y1bQHbS7m4zOc5xGGkKEGjtyiqkaSOr+LUgzFu+uqJ0NHJCyORe+4QVUZHqsy+MvPvaf2tvqRqLN9JGjwlTiY8T4mss7knjuk2V4lm5HbkPWs/UvZ2m0ThKX03xGRGuZYrmNafWrVME2mRftyqyAE0My09KdYGAZIBO6e2H7vP7rV2SzSU2p7KkG8M/El7VnGTl/dL+0MTRO2pLETlhNq8Qt+ThY1zklfzBvvFZ6/1Q9qHI6/s9id0qVgFW7p9z/wEGW7N7vkPLIEMq6aM8AtXOW5hDMcV92a9WOuHesFmLZG+R4y+g6l/YylAKsqIa6YD4wwo+ubepxkNNy1s5+2Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.238) smtp.rcpttodomain=networkplumber.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=LhhaG+kqPle2OAEsawO1hUs7HhdBkskic3DLqbyClnk=; b=c7VgNb9sbQXcRJJYCPLSUrCDKx+ioBgEtgSgSF9QK83JIzCVHd/1c6ZK87FlNQjbvmHFF9NPtXoXu7QDPa+cYFXDW2VvbmVq+EPvcg03IuJK2sDUeJauPwgBiE7wM1Zx7DKMubw4wtOhSpP3HJgL1ab//RHAlCWPrmv/cgIuEqQhpqbmTSrpWsam5/VJhOZkL5Z83lQerkrCJOzz+SOH9Ye7eyHyt7wFZ4TZmtd3p9n9XVGHqODfKg4V+2gK27OD/qH63zBJukua9wnCqV2tLIA05+fZK2jIo6ILv0MEeQbdBzlKTqpVN/U9sVVd/S0Zk/7fW7Pr3BaVPzHpojoRMg== Received: from DM5PR19CA0022.namprd19.prod.outlook.com (2603:10b6:3:151::32) by PH7PR12MB5618.namprd12.prod.outlook.com (2603:10b6:510:134::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5332.22; Wed, 15 Jun 2022 12:59:16 +0000 Received: from DM6NAM11FT023.eop-nam11.prod.protection.outlook.com (2603:10b6:3:151:cafe::d9) by DM5PR19CA0022.outlook.office365.com (2603:10b6:3:151::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5353.14 via Frontend Transport; Wed, 15 Jun 2022 12:59:15 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.238) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.238 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.238; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (12.22.5.238) by DM6NAM11FT023.mail.protection.outlook.com (10.13.173.96) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.5332.12 via Frontend Transport; Wed, 15 Jun 2022 12:59:15 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by DRHQMAIL105.nvidia.com (10.27.9.14) with Microsoft SMTP Server (TLS) id 15.0.1497.32; Wed, 15 Jun 2022 12:59:15 +0000 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 15 Jun 2022 05:59:10 -0700 From: Spike Du To: , , , , Wenzhuo Lu , Beilei Xing , Bernard Iremonger , Shahaf Shuler CC: , , , , Subject: [PATCH v8 6/6] app/testpmd: add Host Shaper command Date: Wed, 15 Jun 2022 15:58:36 +0300 Message-ID: <20220615125836.391771-7-spiked@nvidia.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220615125836.391771-1-spiked@nvidia.com> References: <20220614120134.1828188-2-spiked@nvidia.com> <20220615125836.391771-1-spiked@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 730a2e09-03b7-4e11-a414-08da4eceda24 X-MS-TrafficTypeDiagnostic: PH7PR12MB5618:EE_ X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: cTxPOhwyTRTP/ONUbvWhdmufZibEtuFOZrn/RhgbXtn9eTmsrLc+u5fThAzfZfD+seyBD163nDKHEFDwfUMSRd7lYFdwRtyS61k7ZnU4XgRKBfnfTCbIAgDdv88VtcyOd0ThC9g8uWJbdsCaQn5vXgK54BocbuI/2a1spWJqkxDXd+dee0odGRmcUKdv16OYY9mOfKeJa7ydwCS9pJ2Fxsr+YrugJR7w80Hd4SpTjxONXhYEvfgei5tHnswpbfYS1DdzQem1VuZ3HSwz4bkIdAD+LYMrni2UPlaUPz+ooQPWOxMjvx6dQyqgJHykl3G7WpSsWJcBEauY1bIrEMyvbTW5bsohs7pXjnwExV1eKd+WInZY78g1lZf2+n1nfakArr+y/kIp2m9SnJJoQEZeWP9cvVm4CLRI7ld/8cSwjIRdoemp6XasmmlDIkFCGfEa2yQcglPvCDvzwDPpjUuj6pAx0EvSi/rGpJrJO6cMB7XVxAi1GBCbl9W6yIzUvGUfOwHgPRieG1gNCZ9Vw7RDU1ZtRoQU9BGC80qBW/QblLCJDtw8kRVUXRwOQSphQZQyeyug9IbhOOiKW/+Ur2+gbsyOUidLFxZDdXDI/jJl0ht/uCZf0HxbICMCuTVGX6D21V6gjVATkoJ1MwuXWs6LvAHXSLTkEsCnDE8wq/r/MP69LTWSZRSkEC/djvjJabN0cKP7N9AF/4ilNMGS+HFKwA== X-Forefront-Antispam-Report: CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230016)(4636009)(40470700004)(46966006)(36840700001)(1076003)(110136005)(2616005)(6666004)(47076005)(2906002)(107886003)(70206006)(70586007)(16526019)(186003)(81166007)(55016003)(83380400001)(36860700001)(54906003)(316002)(36756003)(6636002)(336012)(426003)(26005)(7696005)(356005)(6286002)(508600001)(8936002)(5660300002)(8676002)(4326008)(86362001)(82310400005)(40460700003)(30864003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jun 2022 12:59:15.4691 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 730a2e09-03b7-4e11-a414-08da4eceda24 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5618 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add command line options to support host shaper configure. - Command syntax: mlx5 set port host_shaper avail_thresh_triggered <0|1> rate - Example commands: To enable avail_thresh_triggered on port 1 and disable current host shaper: testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 1 rate 0 To disable avail_thresh_triggered and current host shaper on port 1: testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 0 The rate unit is 100Mbps. To disable avail_thresh_triggered and configure a shaper of 5Gbps on port 1: testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 50 Add sample code to handle rxq available descriptor threshold event, it delays a while so that rxq empties, then disables host shaper and rearms available descriptor threshold event. Signed-off-by: Spike Du --- app/test-pmd/testpmd.c | 7 ++ doc/guides/nics/mlx5.rst | 46 +++++++++ drivers/net/mlx5/meson.build | 4 + drivers/net/mlx5/mlx5_testpmd.c | 205 ++++++++++++++++++++++++++++++++++++++++ drivers/net/mlx5/mlx5_testpmd.h | 26 +++++ 5 files changed, 288 insertions(+) create mode 100644 drivers/net/mlx5/mlx5_testpmd.c create mode 100644 drivers/net/mlx5/mlx5_testpmd.h diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index 33d9b85..b491719 100644 --- a/app/test-pmd/testpmd.c +++ b/app/test-pmd/testpmd.c @@ -69,6 +69,9 @@ #ifdef RTE_NET_BOND #include #endif +#ifdef RTE_NET_MLX5 +#include "mlx5_testpmd.h" +#endif #include "testpmd.h" @@ -3659,6 +3662,10 @@ struct pmd_test_command { break; printf("Received avail_thresh event, port:%d rxq_id:%d\n", port_id, rxq_id); + +#ifdef RTE_NET_MLX5 + mlx5_test_avail_thresh_event_handler(port_id, rxq_id); +#endif } break; default: diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 5f7b060..64eaddf 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -1727,3 +1727,49 @@ which can be installed from OFED mstflint package. Meson detects ``libmtcr_ul`` existence at configure stage. If the library is detected, the application must link with ``-lmtcr_ul``, as done by the pkg-config file libdpdk.pc. + +How to use available descriptor threshold and Host Shaper +--------------------------------------------------------- + +There is a command to configure available descriptor threshold in testpmd. +Testpmd also contains sample logic to handle available descriptor threshold event. +The typical workflow is: testpmd configure available descriptor threshold for Rx queues, enable +avail_thresh_triggered in host shaper and register a callback, when traffic from host is +too high and Rx queue emptiness is below available descriptor threshold, PMD receives an event and +firmware configures a 100Mbps shaper on host port automatically, then PMD call +the callback registered previously, which will delay a while to let Rx queue +empty, then disable host shaper. + +Let's assume we have a simple BlueField 2 setup: port 0 is uplink, port 1 +is VF representor. Each port has 2 Rx queues. +In order to control traffic from host to ARM, we can enable available descriptor threshold in testpmd by: + +.. code-block:: console + + testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 1 rate 0 + testpmd> set port 1 rxq 0 avail_thresh 70 + testpmd> set port 1 rxq 1 avail_thresh 70 + +The first command disables current host shaper, and enables available descriptor threshold triggered mode. +The other commands configure available descriptor threshold to 70% of Rx queue size for both Rx queues, +When traffic from host is too high, you can see testpmd console prints log +about available descriptor threshold event receiving, then host shaper is disabled. +The traffic rate from host is controlled and less drop happens in Rx queues. + +The threshold event and shaper can be disabled like this: + +.. code-block:: console + + testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 0 + testpmd> set port 1 rxq 0 avail_thresh 0 + testpmd> set port 1 rxq 1 avail_thresh 0 + +It's recommended an application disables available descriptor threshold and avail_thresh_triggered before exit, +if it enables them before. + +We can also configure the shaper with a value, the rate unit is 100Mbps, below +command sets current shaper to 5Gbps and disables avail_thresh_triggered. + +.. code-block:: console + + testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 50 diff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build index 99210fd..941642b 100644 --- a/drivers/net/mlx5/meson.build +++ b/drivers/net/mlx5/meson.build @@ -68,4 +68,8 @@ if get_option('buildtype').contains('debug') else cflags += [ '-UPEDANTIC' ] endif + +testpmd_sources += files('mlx5_testpmd.c') +testpmd_drivers_deps += 'net_mlx5' + subdir(exec_env) diff --git a/drivers/net/mlx5/mlx5_testpmd.c b/drivers/net/mlx5/mlx5_testpmd.c new file mode 100644 index 0000000..98bd395 --- /dev/null +++ b/drivers/net/mlx5/mlx5_testpmd.c @@ -0,0 +1,205 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2021 6WIND S.A. + * Copyright 2021 Mellanox Technologies, Ltd + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include "mlx5_testpmd.h" +#include "testpmd.h" + +static uint8_t host_shaper_avail_thresh_triggered[RTE_MAX_ETHPORTS]; +#define SHAPER_DISABLE_DELAY_US 100000 /* 100ms */ + +/** + * Disable the host shaper and re-arm available descriptor threshold event. + * + * @param[in] args + * uint32_t integer combining port_id and rxq_id. + */ +static void +mlx5_test_host_shaper_disable(void *args) +{ + uint32_t port_rxq_id = (uint32_t)(uintptr_t)args; + uint16_t port_id = port_rxq_id & 0xffff; + uint16_t qid = (port_rxq_id >> 16) & 0xffff; + struct rte_eth_rxq_info qinfo; + + printf("%s disable shaper\n", __func__); + if (rte_eth_rx_queue_info_get(port_id, qid, &qinfo)) { + printf("rx_queue_info_get returns error\n"); + return; + } + /* Rearm the available descriptor threshold event. */ + if (rte_eth_rx_avail_thresh_set(port_id, qid, qinfo.avail_thresh)) { + printf("config avail_thresh returns error\n"); + return; + } + /* Only disable the shaper when avail_thresh_triggered is set. */ + if (host_shaper_avail_thresh_triggered[port_id] && + rte_pmd_mlx5_host_shaper_config(port_id, 0, 0)) + printf("%s disable shaper returns error\n", __func__); +} + +void +mlx5_test_avail_thresh_event_handler(uint16_t port_id, uint16_t rxq_id) +{ + struct rte_eth_dev_info dev_info; + uint32_t port_rxq_id = port_id | (rxq_id << 16); + + /* Ensure it's MLX5 port. */ + if (rte_eth_dev_info_get(port_id, &dev_info) != 0 || + (strncmp(dev_info.driver_name, "mlx5", 4) != 0)) + return; + rte_eal_alarm_set(SHAPER_DISABLE_DELAY_US, + mlx5_test_host_shaper_disable, + (void *)(uintptr_t)port_rxq_id); + printf("%s port_id:%u rxq_id:%u\n", __func__, port_id, rxq_id); +} + +/** + * Configure host shaper's avail_thresh_triggered and current rate. + * + * @param[in] avail_thresh_triggered + * Disable/enable avail_thresh_triggered. + * @param[in] rate + * Configure current host shaper rate. + * @return + * On success, returns 0. + * On failure, returns < 0. + */ +static int +mlx5_test_set_port_host_shaper(uint16_t port_id, uint16_t avail_thresh_triggered, uint8_t rate) +{ + struct rte_eth_link link; + bool port_id_valid = false; + uint16_t pid; + int ret; + + RTE_ETH_FOREACH_DEV(pid) + if (port_id == pid) { + port_id_valid = true; + break; + } + if (!port_id_valid) + return -EINVAL; + ret = rte_eth_link_get_nowait(port_id, &link); + if (ret < 0) + return ret; + host_shaper_avail_thresh_triggered[port_id] = avail_thresh_triggered ? 1 : 0; + if (!avail_thresh_triggered) { + ret = rte_pmd_mlx5_host_shaper_config(port_id, 0, + RTE_BIT32(MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED)); + } else { + ret = rte_pmd_mlx5_host_shaper_config(port_id, 1, + RTE_BIT32(MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED)); + } + if (ret) + return ret; + ret = rte_pmd_mlx5_host_shaper_config(port_id, rate, 0); + if (ret) + return ret; + return 0; +} + +/* *** SET HOST_SHAPER FOR A PORT *** */ +struct cmd_port_host_shaper_result { + cmdline_fixed_string_t mlx5; + cmdline_fixed_string_t set; + cmdline_fixed_string_t port; + uint16_t port_num; + cmdline_fixed_string_t host_shaper; + cmdline_fixed_string_t avail_thresh_triggered; + uint16_t fr; + cmdline_fixed_string_t rate; + uint8_t rate_num; +}; + +static void cmd_port_host_shaper_parsed(void *parsed_result, + __rte_unused struct cmdline *cl, + __rte_unused void *data) +{ + struct cmd_port_host_shaper_result *res = parsed_result; + int ret = 0; + + if ((strcmp(res->mlx5, "mlx5") == 0) && + (strcmp(res->set, "set") == 0) && + (strcmp(res->port, "port") == 0) && + (strcmp(res->host_shaper, "host_shaper") == 0) && + (strcmp(res->avail_thresh_triggered, "avail_thresh_triggered") == 0) && + (strcmp(res->rate, "rate") == 0)) + ret = mlx5_test_set_port_host_shaper(res->port_num, res->fr, + res->rate_num); + if (ret < 0) + printf("cmd_port_host_shaper error: (%s)\n", strerror(-ret)); +} + +static cmdline_parse_token_string_t cmd_port_host_shaper_mlx5 = + TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result, + mlx5, "mlx5"); +static cmdline_parse_token_string_t cmd_port_host_shaper_set = + TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result, + set, "set"); +static cmdline_parse_token_string_t cmd_port_host_shaper_port = + TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result, + port, "port"); +static cmdline_parse_token_num_t cmd_port_host_shaper_portnum = + TOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result, + port_num, RTE_UINT16); +static cmdline_parse_token_string_t cmd_port_host_shaper_host_shaper = + TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result, + host_shaper, "host_shaper"); +static cmdline_parse_token_string_t cmd_port_host_shaper_avail_thresh_triggered = + TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result, + avail_thresh_triggered, "avail_thresh_triggered"); +static cmdline_parse_token_num_t cmd_port_host_shaper_fr = + TOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result, + fr, RTE_UINT16); +static cmdline_parse_token_string_t cmd_port_host_shaper_rate = + TOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result, + rate, "rate"); +static cmdline_parse_token_num_t cmd_port_host_shaper_rate_num = + TOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result, + rate_num, RTE_UINT8); +static cmdline_parse_inst_t mlx5_test_cmd_port_host_shaper = { + .f = cmd_port_host_shaper_parsed, + .data = (void *)0, + .help_str = "mlx5 set port host_shaper avail_thresh_triggered <0|1> " + "rate : Set HOST_SHAPER avail_thresh_triggered and rate with port_id", + .tokens = { + (void *)&cmd_port_host_shaper_mlx5, + (void *)&cmd_port_host_shaper_set, + (void *)&cmd_port_host_shaper_port, + (void *)&cmd_port_host_shaper_portnum, + (void *)&cmd_port_host_shaper_host_shaper, + (void *)&cmd_port_host_shaper_avail_thresh_triggered, + (void *)&cmd_port_host_shaper_fr, + (void *)&cmd_port_host_shaper_rate, + (void *)&cmd_port_host_shaper_rate_num, + NULL, + } +}; + +static struct testpmd_driver_commands mlx5_driver_cmds = { + .commands = { + { + .ctx = &mlx5_test_cmd_port_host_shaper, + .help = "mlx5 set port (port_id) host_shaper avail_thresh_triggered (on|off)" + "rate (rate_num):\n" + " Set HOST_SHAPER avail_thresh_triggered and rate with port_id\n\n", + }, + { + .ctx = NULL, + }, + } +}; +TESTPMD_ADD_DRIVER_COMMANDS(mlx5_driver_cmds); diff --git a/drivers/net/mlx5/mlx5_testpmd.h b/drivers/net/mlx5/mlx5_testpmd.h new file mode 100644 index 0000000..7a54658 --- /dev/null +++ b/drivers/net/mlx5/mlx5_testpmd.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright 2021 6WIND S.A. + * Copyright 2021 Mellanox Technologies, Ltd + */ + +#ifndef RTE_PMD_MLX5_TEST_H_ +#define RTE_PMD_MLX5_TEST_H_ + +#include +#include +#include + +/** + * RTE_ETH_EVENT_RX_AVAIL_THRESH handler sample code. + * It's called in testpmd, the work flow here is delay a while until + * RX queueu is empty, then disable host shaper. + * + * @param[in] port_id + * Port identifier. + * @param[in] rxq_id + * Rx queue identifier. + */ +void +mlx5_test_avail_thresh_event_handler(uint16_t port_id, uint16_t rxq_id); + +#endif