From patchwork Fri Jul 29 19:30:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xiaoyun" X-Patchwork-Id: 114455 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3C350A00C4; Fri, 29 Jul 2022 21:31:39 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0084342C65; Fri, 29 Jul 2022 21:31:14 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id 1B07942C65 for ; Fri, 29 Jul 2022 21:31:10 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1659123071; x=1690659071; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HQbiMWB4WaxmYzhxYDsr4AAT4AV5M4VuMJC6UJh+72I=; b=B/nVX0edONY2H6nqF61EXJ+BtKQ3ZHHLvq8WKtuUIvNtJvsTcuqgoMwc cbUUKw0lKWTftcrx/piQmR1lkQoVslXb03WgWoX4K/jjqo1m2ia3qOxwc XzplJpy6g4Mmq0EPvI93rqIUK8B+wcRK5dsLZFUoigxXxiKA6MpJ/xMbn 05LuNxtbOTGbutOnXmv8Oa306q/NUqaypkQarlN9ytmig7OVOPf7TMJWe ppUZCqAvW6T15mil/YmQVuJzvSO2InqXjrHFHhh1Kw2Ul8q/gNkGDQ3Xl kfsQTjtO3vXJmZak+PMbVS7pAzeqjICzo5fOk3ZH9ZMjrKOZPc4jLjPIV w==; X-IronPort-AV: E=McAfee;i="6400,9594,10423"; a="268602933" X-IronPort-AV: E=Sophos;i="5.93,201,1654585200"; d="scan'208";a="268602933" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Jul 2022 12:31:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,201,1654585200"; d="scan'208";a="577059552" Received: from silpixa00399779.ir.intel.com (HELO silpixa00399779.ger.corp.intel.com) ([10.237.223.111]) by orsmga006.jf.intel.com with ESMTP; 29 Jul 2022 12:31:09 -0700 From: Xiaoyun Li To: junfeng.guo@intel.com, qi.z.zhang@intel.com, awogbemila@google.com, bruce.richardson@intel.com Cc: dev@dpdk.org, Xiaoyun Li Subject: [PATCH 05/10] net/gve: add MTU set support Date: Fri, 29 Jul 2022 19:30:37 +0000 Message-Id: <20220729193042.2764633-6-xiaoyun.li@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220729193042.2764633-1-xiaoyun.li@intel.com> References: <20220729193042.2764633-1-xiaoyun.li@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Support dev_ops mtu_set. Signed-off-by: Xiaoyun Li --- drivers/net/gve/gve_ethdev.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index 435115c047..26b45fde6f 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -97,12 +97,41 @@ gve_dev_close(struct rte_eth_dev *dev) return err; } +static int +gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) +{ + struct gve_priv *priv = dev->data->dev_private; + int err; + + if (mtu < RTE_ETHER_MIN_MTU || mtu > priv->max_mtu) { + PMD_DRV_LOG(ERR, "MIN MTU is %u MAX MTU is %u", RTE_ETHER_MIN_MTU, priv->max_mtu); + return -EINVAL; + } + + /* mtu setting is forbidden if port is start */ + if (dev->data->dev_started) { + PMD_DRV_LOG(ERR, "Port must be stopped before configuration"); + return -EBUSY; + } + + dev->data->dev_conf.rxmode.mtu = mtu + RTE_ETHER_HDR_LEN; + + err = gve_adminq_set_mtu(priv, mtu); + if (err) { + PMD_DRV_LOG(ERR, "Failed to set mtu as %u err = %d", mtu, err); + return err; + } + + return 0; +} + static const struct eth_dev_ops gve_eth_dev_ops = { .dev_configure = gve_dev_configure, .dev_start = gve_dev_start, .dev_stop = gve_dev_stop, .dev_close = gve_dev_close, .link_update = gve_link_update, + .mtu_set = gve_dev_mtu_set, }; static void