From patchwork Mon Aug 8 08:05:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anoob Joseph X-Patchwork-Id: 114698 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4F09DA034C; Mon, 8 Aug 2022 10:07:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 29D8442C3C; Mon, 8 Aug 2022 10:06:32 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id B972342BF4 for ; Mon, 8 Aug 2022 10:06:30 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 277N0ebX006022 for ; Mon, 8 Aug 2022 01:06:30 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=Lt5En0iNnf3iEtTDhzPIHZ6WpGSX/nQJAm2ATQ3LWuM=; b=HewCZGZOBtY5yi0MTNYOf9KLxnKlohvFOsu5PFqvL+M/9fZTXk7TgZyiFdgAPeqO33hk SpyJBM8zOQ9rtJ+Cna/u0mwQCxB2LC2IgfdAbRdYrk6eQCHm/vv9vAZvCPTJKgZeLJy7 rgWz80TYPnDH9nvM17e4gGRFTujl6oTSl0vcK3niq5WknKjSc7hx6IIZ2UNLzsf9tQvV pvMhlbR3bFyggohi5VNDUlxiCY5BoM545ViqR4mDfKIHAwdr/h7ajkZ1BySNBK6aq0wK rBVwH1fxmgVpl5WEdd/L6fF/7CiIXQx7DInZfv7h6aNr2hyFrpwf9KNAoCOEqyXbZixu Zw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hsqtmmxeg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 08 Aug 2022 01:06:29 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 8 Aug 2022 01:06:27 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 8 Aug 2022 01:06:27 -0700 Received: from BG-LT92004.corp.innovium.com (unknown [10.28.160.62]) by maili.marvell.com (Postfix) with ESMTP id 543933F7043; Mon, 8 Aug 2022 01:06:25 -0700 (PDT) From: Anoob Joseph To: Akhil Goyal , Jerin Jacob CC: Tejasree Kondoj , Archana Muniganti , Subject: [PATCH 08/18] crypto/cnxk: fix endianness in anti-replay Date: Mon, 8 Aug 2022 13:35:56 +0530 Message-ID: <20220808080606.220-9-anoobj@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220808080606.220-1-anoobj@marvell.com> References: <20220808080606.220-1-anoobj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: yhXJVxh8B0i2tkyweTZAi0AfgrOXfUhi X-Proofpoint-ORIG-GUID: yhXJVxh8B0i2tkyweTZAi0AfgrOXfUhi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-08_05,2022-08-05_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Tejasree Kondoj Fixing anti-replay endianness issue in lookaside IPsec. Fixes: c1eac1b966c2 ("crypto/cnxk: add anti-replay as per new firmware") Cc: ktejasree@marvell.com Signed-off-by: Tejasree Kondoj --- drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c index 3d69723809..b753c1cb4b 100644 --- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c @@ -487,22 +487,19 @@ cn9k_cpt_crypto_adapter_enqueue(uintptr_t base, struct rte_crypto_op *op) } static inline int -ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz, - struct roc_ie_on_inb_hdr *data) +ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz, struct roc_ie_on_inb_hdr *data) { + uint32_t esn_low, esn_hi, seql, seqh = 0; struct roc_ie_on_common_sa *common_sa; struct roc_ie_on_inb_sa *in_sa; - struct roc_ie_on_sa_ctl *ctl; - uint32_t seql, seqh = 0; - uint64_t seq; + uint64_t seq, seq_in_sa; uint8_t esn; int ret; in_sa = &sa->in_sa; common_sa = &in_sa->common_sa; - ctl = &common_sa->ctl; - esn = ctl->esn_en; + esn = common_sa->ctl.esn_en; seql = rte_be_to_cpu_32(data->seql); if (!esn) { @@ -517,9 +514,13 @@ ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz, ret = cnxk_on_anti_replay_check(seq, &sa->ar, win_sz); if (esn && !ret) { - common_sa = &sa->in_sa.common_sa; - if (seq > common_sa->seq_t.u64) - common_sa->seq_t.u64 = seq; + esn_low = rte_be_to_cpu_32(common_sa->seq_t.tl); + esn_hi = rte_be_to_cpu_32(common_sa->seq_t.th); + seq_in_sa = ((uint64_t)esn_hi << 32) | esn_low; + if (seq > seq_in_sa) { + common_sa->seq_t.tl = rte_cpu_to_be_32(seql); + common_sa->seq_t.th = rte_cpu_to_be_32(seqh); + } } return ret;