From patchwork Tue Aug 9 18:49:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 114780 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E05D1A04FD; Tue, 9 Aug 2022 20:51:24 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EC43142C17; Tue, 9 Aug 2022 20:50:45 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id CD1AF42C02 for ; Tue, 9 Aug 2022 20:50:44 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 279D8BCu017014 for ; Tue, 9 Aug 2022 11:50:44 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=/SUA2jBXL/N25g3/A1/sgFC0qjZ8OusnYIZFOSXza5s=; b=ZdsuJDXJx/RlfgAthUyImUi7StLVhvJ6WIHBJY+pNpXzLKxGcbDhEW+hH5FvCulIj24J r3tKdGm6bNJ6wRVYgxpnvJNM4XbAdrqfFme8rIok0QU2gd/VBMa6aCXB3qalfBiWRJzl wypleAm9xphEXX+WzB91953tMqy0icn+qN0ZoAo5rqsvGhOBXjgY3wjtVjdvI0RJgtDo pVzUChTygtWFFk/W+rACEKE09VOR+eyMLJVuM7+lURNljVzn2hV9+yUZ8oWmxDbG0gpf G7vHHIq9AOv0uK4+O/QBN+2Omnv0WG1+v9d1HSVsq0PxaIePqbOVVxiC6uWWIy3sBwLc 7A== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hudy6ujwa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 09 Aug 2022 11:50:44 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 9 Aug 2022 11:50:42 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 9 Aug 2022 11:50:41 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 263633F7087; Tue, 9 Aug 2022 11:50:39 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 20/23] net/cnxk: skip PFC configuration on LBK Date: Wed, 10 Aug 2022 00:19:04 +0530 Message-ID: <20220809184908.24030-20-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220809184908.24030-1-ndabilpuram@marvell.com> References: <20220809184908.24030-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: M2J8e8-Y7Upp35_NIXVE1kiHtMugvUOG X-Proofpoint-ORIG-GUID: M2J8e8-Y7Upp35_NIXVE1kiHtMugvUOG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao CNXK platforms do not support PFC on LBK so skipping configuration on LBK interfaces. Signed-off-by: Satha Rao --- drivers/net/cnxk/cnxk_ethdev.c | 2 +- drivers/net/cnxk/cnxk_ethdev_ops.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index 02416ad..f08a20f 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1859,7 +1859,7 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool reset) pfc_conf.tx_pause.rx_qid = i; rc = cnxk_nix_priority_flow_ctrl_queue_config(eth_dev, &pfc_conf); - if (rc) + if (rc && rc != -ENOTSUP) plt_err("Failed to reset PFC. error code(%d)", rc); } diff --git a/drivers/net/cnxk/cnxk_ethdev_ops.c b/drivers/net/cnxk/cnxk_ethdev_ops.c index 1592971..64beabd 100644 --- a/drivers/net/cnxk/cnxk_ethdev_ops.c +++ b/drivers/net/cnxk/cnxk_ethdev_ops.c @@ -356,8 +356,8 @@ cnxk_nix_priority_flow_ctrl_queue_config(struct rte_eth_dev *eth_dev, return -ENOTSUP; } - if (roc_nix_is_sdp(nix)) { - plt_err("Prio flow ctrl config is not allowed on SDP"); + if (roc_nix_is_sdp(nix) || roc_nix_is_lbk(nix)) { + plt_nix_dbg("Prio flow ctrl config is not allowed on SDP/LBK"); return -ENOTSUP; }