From patchwork Mon Aug 15 07:13:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115022 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A13AA00C3; Mon, 15 Aug 2022 01:09:17 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 431D342CD2; Mon, 15 Aug 2022 01:04:52 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 5CBA542CD2 for ; Mon, 15 Aug 2022 01:04:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660518290; x=1692054290; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QjICDTOVkCAOKq4rZOTg0v+gT7sawfN1u491kqZngyA=; b=TLlRswUVfGtEivEGKZS8ykaiE9RTsWXEDupKor5JphTJ0MNIc3YlYGec NEArTepfxWnkE7PdeHefTKSlZmuH4XQq5740miTurrUqPhJm/qdDlNQBr GDTQcvJqYcdJ9rNLxG7Y8A3dm4mCHCuOORij7hyqrBdayWXgIrHg34QM/ dsoAt38QeiBHeT+TBkETa0kO3bcK2V6KOBM/qwzdXaFverIZX4SGkt662 zVDosZ40XfTW04qoMYLElLoEGtOvPyC2mp6VB0YNCaUFWZSSeUW/UIOod xQyOJ83Um2fENhSk/+Yo3dI9rIW8gcf9MXIah9N3oqzWETiTQTq4RUWuR g==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="293128817" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="293128817" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:04:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="934296974" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by fmsmga005.fm.intel.com with ESMTP; 14 Aug 2022 16:04:48 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Karol Kolacinski Subject: [PATCH 65/70] net/ice/base: remove unnecessary fields Date: Mon, 15 Aug 2022 03:13:01 -0400 Message-Id: <20220815071306.2910599-66-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815071306.2910599-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Remove unnecessary fields in data structure for 1588 and QoS func capabilities. Signed-off-by: Karol Kolacinski Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 5 ++--- drivers/net/ice/base/ice_switch.c | 2 -- drivers/net/ice/base/ice_type.h | 6 ------ 3 files changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 44592d20bf..3d4e05f2b0 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -2579,7 +2579,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, * related information. */ ice_debug(hw, ICE_DBG_INIT, "1588 func caps: unknown clock frequency %u\n", - info->clk_freq); + clk_freq); info->time_ref = ICE_TIME_REF_FREQ_25_000; } @@ -2594,7 +2594,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p, ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_assoc = %u\n", info->tmr_index_assoc); ice_debug(hw, ICE_DBG_INIT, "func caps: clk_freq = %u\n", - info->clk_freq); + clk_freq); ice_debug(hw, ICE_DBG_INIT, "func caps: clk_src = %u\n", info->clk_src); } @@ -2752,7 +2752,6 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p, struct ice_aqc_list_caps_elem *cap) { struct ice_ts_dev_info *info = &dev_p->ts_dev_info; - u32 logical_id = LE32_TO_CPU(cap->logical_id); u32 phys_id = LE32_TO_CPU(cap->phys_id); u32 number = LE32_TO_CPU(cap->number); diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index afc0fff84b..ac045790ad 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -3546,8 +3546,6 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type, pi->sw_id = swid; pi->pf_vf_num = pf_vf_num; pi->is_vf = is_vf; - pi->dflt_tx_vsi_num = ICE_DFLT_VSI_INVAL; - pi->dflt_rx_vsi_num = ICE_DFLT_VSI_INVAL; break; default: ice_debug(pi->hw, ICE_DBG_SW, "incorrect VSI/port type received\n"); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 043dae7781..fc5b4b4c5c 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -661,7 +661,6 @@ enum ice_clk_src { struct ice_ts_func_info { /* Function specific info */ enum ice_time_ref_freq time_ref; - u8 clk_freq; u8 clk_src : 1; u8 tmr_index_assoc : 1; u8 ena : 1; @@ -683,7 +682,6 @@ struct ice_ts_func_info { struct ice_ts_dev_info { /* Device specific info */ - u32 ena_ports; u32 tmr_own_map; u8 tmr0_owner; u8 tmr1_owner; @@ -1098,10 +1096,6 @@ struct ice_port_info { #define ICE_SCHED_PORT_STATE_READY 0x1 u8 lport; #define ICE_LPORT_MASK 0xff - u16 dflt_tx_vsi_rule_id; - u16 dflt_tx_vsi_num; - u16 dflt_rx_vsi_rule_id; - u16 dflt_rx_vsi_num; struct ice_fc_info fc; struct ice_mac_info mac; struct ice_phy_info phy;