[v2,27/70] net/ice/base: convert IO expander handle to u16

Message ID 20220815073206.2917968-28-qi.z.zhang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series ice base code update |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Qi Zhang Aug. 15, 2022, 7:31 a.m. UTC
  The io_expander_handle cached value is marked as an __le16, but
several places track the node handle with u16 values. Unify all
the interfaces so that it is stored and reported as a u16, and
keep the low level conversion to LE16 only at the direct firmware
interface.

This fixes warnings from sparse about mixing __le16 and u16, and
will fix related issues on platforms which use Big Endian format.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_ptp_hw.c | 10 +++++++---
 drivers/net/ice/base/ice_type.h   |  2 +-
 2 files changed, 8 insertions(+), 4 deletions(-)
  

Patch

diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 1fb0c57a8c..3df0915cd3 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -4483,7 +4483,7 @@  ice_ptp_port_cmd_e810(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd,
  * will return cached value
  */
 static enum ice_status
-ice_get_pca9575_handle(struct ice_hw *hw, __le16 *pca9575_handle)
+ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle)
 {
 	struct ice_aqc_get_link_topo cmd;
 	u8 node_part_number, idx;
@@ -4564,13 +4564,15 @@  ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data)
 	struct ice_aqc_link_topo_addr link_topo;
 	enum ice_status status;
 	__le16 addr;
+	u16 handle;
 
 	memset(&link_topo, 0, sizeof(link_topo));
 
-	status = ice_get_pca9575_handle(hw, &link_topo.handle);
+	status = ice_get_pca9575_handle(hw, &handle);
 	if (status)
 		return status;
 
+	link_topo.handle = CPU_TO_LE16(handle);
 	link_topo.topo_params.node_type_ctx =
 		(ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED <<
 		 ICE_AQC_LINK_TOPO_NODE_CTX_S);
@@ -4594,13 +4596,15 @@  ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data)
 	struct ice_aqc_link_topo_addr link_topo;
 	enum ice_status status;
 	__le16 addr;
+	u16 handle;
 
 	memset(&link_topo, 0, sizeof(link_topo));
 
-	status = ice_get_pca9575_handle(hw, &link_topo.handle);
+	status = ice_get_pca9575_handle(hw, &handle);
 	if (status)
 		return status;
 
+	link_topo.handle = CPU_TO_LE16(handle);
 	link_topo.topo_params.node_type_ctx =
 		(ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED <<
 		 ICE_AQC_LINK_TOPO_NODE_CTX_S);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index d94fdcda67..b8be0d948a 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1259,7 +1259,7 @@  struct ice_hw {
 	struct LIST_HEAD_TYPE rss_list_head;
 	ice_declare_bitmap(hw_ptype, ICE_FLOW_PTYPE_MAX);
 	u8 dvm_ena;
-	__le16 io_expander_handle;
+	u16 io_expander_handle;
 };
 
 /* Statistics collected by each port, VSI, VEB, and S-channel */