From patchwork Mon Aug 15 07:31:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115058 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E58BFA00C3; Mon, 15 Aug 2022 01:25:09 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BED7B42B73; Mon, 15 Aug 2022 01:23:08 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 4730142B72; Mon, 15 Aug 2022 01:23:06 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519386; x=1692055386; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xRmhmu7KrFzUqTlG1+C7qRO+UP0UQlIll5tShXE0muc=; b=QXaN581i2e9yLD3v89NeAbfv8NVj9xCOV86inNpIYC5eZI1vJQOLygzZ puRcrCjHDMV7NubM/kQEP82cumuXm0WSsIlaaEirMN3jZStTaqIcTTNs6 kQWu2i3NSrPtBMdLVc5LSuloXjlPNBKtJ/d13Vg573/0KKFTmX28+ThdF eHRygTOcAl3xjC2yAmaMpByOrysMRrQFtfLNQCLDjatgOTThOAKdAj9y2 Mg8VU2AAJUrPdoXIuUBhZrcO4dwFpRATAgDySS9CgSQcnCL8R0LHWBJGe ptEwB5GpCI1CSdpUnwOwI4HFWQkrHTqicqtSM+yYxFv9/upO9Ye4ZGOKp w==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="291857967" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="291857967" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283158" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:04 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , stable@dpdk.org, Junfeng Guo Subject: [PATCH v2 30/70] net/ice/base: fix bit finding range over ptype bitmap Date: Mon, 15 Aug 2022 03:31:26 -0400 Message-Id: <20220815073206.2917968-31-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The 2nd argument to function ice_find_first_bit is the bitmap size, (in bits) not a mask. Thus, use of UINT16_MAX or 0xFFFF will allow a potential run off the end of the ptype array. Also, the ptype bitmap (i.e., prof->ptypes) is declared with size ICE_FLOW_PTYPE_MAX, thus finding the bits within this bitmap should not exceed this bound. Fixes: 8ebb93942b2c ("net/ice/base: add function to set HW profile for raw flow") Cc: stable@dpdk.org Signed-off-by: Junfeng Guo Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 54181044f1..b196e51276 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2561,7 +2561,7 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle, u16 fdir_vsi_handle, struct ice_parser_profile *prof, enum ice_block blk) { - int id = ice_find_first_bit(prof->ptypes, UINT16_MAX); + int id = ice_find_first_bit(prof->ptypes, ICE_FLOW_PTYPE_MAX); struct ice_flow_prof_params *params; u8 fv_words = hw->blk[blk].es.fvw; enum ice_status status;