From patchwork Mon Aug 15 07:31:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115088 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E7D9DA00C3; Mon, 15 Aug 2022 01:27:29 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E700C42CF1; Mon, 15 Aug 2022 01:23:57 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id AE17842BC9 for ; Mon, 15 Aug 2022 01:23:54 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519434; x=1692055434; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jmc/4JUNKCuVrpw9D+UxonivIKWsKVG/U5NPYuzt1s8=; b=SPFjYPZIzPDZbtWR6XRTbFZ/aM8c+vQgilUAIZnLHbSgzHnVPFK/emhA XvW31pb5POMn0enGGnwwKpr+XsKJfE24W6Z8bjRL5U43jwDdrKds0bVSS wHA1JnFNRjVSI00n2AuOqrfuNTK2+AGWByE9onOd+EtI0KN3Hpsm0lM6B UImLQCqh3NMoFgimshuY4rw1Lgagm4ZlrH8rAEtO9HxXatBssDIktdRa/ rjD4//hI25IiyCAKeTIK8bG+GJztz+VkbUwHFJU5Pse4kYwP2XMt8zLX7 +33aB308ZRWWDDXl5AyZ/bGlJU+K6ooJZ2+NR2xRXknJvD36lYCciO1iU g==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="274914515" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="274914515" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283322" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:53 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Alice Michael Subject: [PATCH v2 60/70] net/ice/base: update comment for overloaded GCO bit Date: Mon, 15 Aug 2022 03:31:56 -0400 Message-Id: <20220815073206.2917968-61-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The bit that is overloaded is bit 11 in the flex descriptor, updating the comment to have the right one reflected. Signed-off-by: Alice Michael Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_lan_tx_rx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index 2b6f039dcb..ba1b9a66d8 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -544,7 +544,7 @@ struct ice_32b_rx_flex_desc_nic_raw_csum { __le32 rss_hash; /* Qword 2 */ - __le16 status_error1; /* bit 6 Raw CSUM present */ + __le16 status_error1; /* bit 11 Raw CSUM present */ u8 flexi_flags2; u8 ts_low; __le16 l2tag2_1st;