From patchwork Mon Aug 15 07:32:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115095 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8BCC6A00C3; Mon, 15 Aug 2022 01:28:01 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C466E42D11; Mon, 15 Aug 2022 01:24:09 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 0B6FF42D29 for ; Mon, 15 Aug 2022 01:24:05 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519446; x=1692055446; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oFnOBnuHm6++/2jL1puAA9rbQNSlx446jLtwTxnxXto=; b=eOxQkVEIYFVskVXfM0eKxIaUMpsY9qgj0sI+l2MYfO6Fi7DrXIZi9Pl3 5mmSkms35ea2lWcKBKuPRjptuvJEYiKEbCZLxZvx+1u83eqCSGKYG/dCv pOIBwIjh9YXN80qCXkasmLM4Xiapg+H0qnUCwxlk03iyw3PhHdDTqq9Zj am7iKNwqsqBTsK9KlRJMqsAwiiKJi/Cf/G08IiR8bQ/V56EX42ZnQqtJb EDtniaI/ICU4dlxObseJKiATmF1WKo+wPTlluoQRWEDDsXDAp/ellckp1 oF5N/m9h9ztRzHWMfdbL4d5XpfK0Ji/jnmeNTTgirQoeBIG6TyAyXE5Tx w==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="274914527" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="274914527" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:24:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283380" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:24:04 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Karol Kolacinski Subject: [PATCH v2 67/70] net/ice/base: check for PTP HW lock more frequently Date: Mon, 15 Aug 2022 03:32:03 -0400 Message-Id: <20220815073206.2917968-68-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org PTP HW semaphore can be held for ~50 ms in worst case. SW should wait longer and check more frequently if the HW lock is held. Signed-off-by: Karol Kolacinski Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_ptp_hw.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index f5ebf5f328..974c96f60c 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -4844,18 +4844,18 @@ bool ice_ptp_lock(struct ice_hw *hw) u32 hw_lock; int i; -#define MAX_TRIES 5 +#define MAX_TRIES 15 for (i = 0; i < MAX_TRIES; i++) { hw_lock = rd32(hw, PFTSYN_SEM + (PFTSYN_SEM_BYTES * hw->pf_id)); hw_lock = hw_lock & PFTSYN_SEM_BUSY_M; if (hw_lock) { /* Somebody is holding the lock */ - ice_msec_delay(10, true); + ice_msec_delay(5, true); continue; - } else { - break; } + + break; } return !hw_lock;