@@ -508,6 +508,8 @@ struct acc100_registry_addr {
unsigned int depth_log1_offset;
unsigned int qman_group_func;
unsigned int ddr_range;
+ unsigned int pmon_ctrl_a;
+ unsigned int pmon_ctrl_b;
};
/* Structure holding registry addresses for PF */
@@ -537,6 +539,8 @@ static const struct acc100_registry_addr pf_reg_addr = {
.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,
.qman_group_func = HWPfQmgrGrpFunction0,
.ddr_range = HWPfDmaVfDdrBaseRw,
+ .pmon_ctrl_a = HWPfPermonACntrlRegVf,
+ .pmon_ctrl_b = HWPfPermonBCntrlRegVf,
};
/* Structure holding registry addresses for VF */
@@ -566,6 +570,8 @@ static const struct acc100_registry_addr vf_reg_addr = {
.depth_log1_offset = HWVfQmgrGrpDepthLog21Vf,
.qman_group_func = HWVfQmgrGrpFunction0Vf,
.ddr_range = HWVfDmaDdrBaseRangeRoVf,
+ .pmon_ctrl_a = HWVfPmACntrlRegVf,
+ .pmon_ctrl_b = HWVfPmBCntrlRegVf,
};
/* Structure associated with each queue. */
@@ -653,6 +653,11 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
/* Read the populated cfg from ACC100 registers */
fetch_acc100_config(dev);
+ for (value = 0; value <= 2; value++) {
+ acc100_reg_write(d, reg_addr->pmon_ctrl_a, value);
+ acc100_reg_write(d, reg_addr->pmon_ctrl_b, value);
+ }
+
/* Release AXI from PF */
if (d->pf_device)
acc100_reg_write(d, HWPfDmaAxiControl, 1);